;
; FILENAME: cydeviceiar_trm.inc
; 
; PSoC Creator  3.1 SP3
;
; DESCRIPTION:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
; Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
; You may use this file only in accordance with the license, terms, conditions, 
; disclaimers, and limitations in the end user license agreement accompanying 
; the software package with which this file was provided.
;-------------------------------------------------------------------------------

#define CYDEV_FLASH_BASE 0x00000000
#define CYDEV_FLASH_SIZE 0x00008000
#define CYREG_FLASH_DATA_MBASE 0x00000000
#define CYREG_FLASH_DATA_MSIZE 0x00008000
#define CYDEV_SFLASH_BASE 0x0ffff000
#define CYDEV_SFLASH_SIZE 0x00000200
#define CYREG_SFLASH_PROT_ROW00 0x0ffff000
#define CYREG_SFLASH_PROT_ROW01 0x0ffff001
#define CYREG_SFLASH_PROT_ROW02 0x0ffff002
#define CYREG_SFLASH_PROT_ROW03 0x0ffff003
#define CYREG_SFLASH_PROT_ROW04 0x0ffff004
#define CYREG_SFLASH_PROT_ROW05 0x0ffff005
#define CYREG_SFLASH_PROT_ROW06 0x0ffff006
#define CYREG_SFLASH_PROT_ROW07 0x0ffff007
#define CYREG_SFLASH_PROT_ROW08 0x0ffff008
#define CYREG_SFLASH_PROT_ROW09 0x0ffff009
#define CYREG_SFLASH_PROT_ROW10 0x0ffff00a
#define CYREG_SFLASH_PROT_ROW11 0x0ffff00b
#define CYREG_SFLASH_PROT_ROW12 0x0ffff00c
#define CYREG_SFLASH_PROT_ROW13 0x0ffff00d
#define CYREG_SFLASH_PROT_ROW14 0x0ffff00e
#define CYREG_SFLASH_PROT_ROW15 0x0ffff00f
#define CYREG_SFLASH_PROT_ROW16 0x0ffff010
#define CYREG_SFLASH_PROT_ROW17 0x0ffff011
#define CYREG_SFLASH_PROT_ROW18 0x0ffff012
#define CYREG_SFLASH_PROT_ROW19 0x0ffff013
#define CYREG_SFLASH_PROT_ROW20 0x0ffff014
#define CYREG_SFLASH_PROT_ROW21 0x0ffff015
#define CYREG_SFLASH_PROT_ROW22 0x0ffff016
#define CYREG_SFLASH_PROT_ROW23 0x0ffff017
#define CYREG_SFLASH_PROT_ROW24 0x0ffff018
#define CYREG_SFLASH_PROT_ROW25 0x0ffff019
#define CYREG_SFLASH_PROT_ROW26 0x0ffff01a
#define CYREG_SFLASH_PROT_ROW27 0x0ffff01b
#define CYREG_SFLASH_PROT_ROW28 0x0ffff01c
#define CYREG_SFLASH_PROT_ROW29 0x0ffff01d
#define CYREG_SFLASH_PROT_ROW30 0x0ffff01e
#define CYREG_SFLASH_PROT_ROW31 0x0ffff01f
#define CYREG_SFLASH_PROT_ROW32 0x0ffff020
#define CYREG_SFLASH_PROT_ROW33 0x0ffff021
#define CYREG_SFLASH_PROT_ROW34 0x0ffff022
#define CYREG_SFLASH_PROT_ROW35 0x0ffff023
#define CYREG_SFLASH_PROT_ROW36 0x0ffff024
#define CYREG_SFLASH_PROT_ROW37 0x0ffff025
#define CYREG_SFLASH_PROT_ROW38 0x0ffff026
#define CYREG_SFLASH_PROT_ROW39 0x0ffff027
#define CYREG_SFLASH_PROT_ROW40 0x0ffff028
#define CYREG_SFLASH_PROT_ROW41 0x0ffff029
#define CYREG_SFLASH_PROT_ROW42 0x0ffff02a
#define CYREG_SFLASH_PROT_ROW43 0x0ffff02b
#define CYREG_SFLASH_PROT_ROW44 0x0ffff02c
#define CYREG_SFLASH_PROT_ROW45 0x0ffff02d
#define CYREG_SFLASH_PROT_ROW46 0x0ffff02e
#define CYREG_SFLASH_PROT_ROW47 0x0ffff02f
#define CYREG_SFLASH_PROT_ROW48 0x0ffff030
#define CYREG_SFLASH_PROT_ROW49 0x0ffff031
#define CYREG_SFLASH_PROT_ROW50 0x0ffff032
#define CYREG_SFLASH_PROT_ROW51 0x0ffff033
#define CYREG_SFLASH_PROT_ROW52 0x0ffff034
#define CYREG_SFLASH_PROT_ROW53 0x0ffff035
#define CYREG_SFLASH_PROT_ROW54 0x0ffff036
#define CYREG_SFLASH_PROT_ROW55 0x0ffff037
#define CYREG_SFLASH_PROT_ROW56 0x0ffff038
#define CYREG_SFLASH_PROT_ROW57 0x0ffff039
#define CYREG_SFLASH_PROT_ROW58 0x0ffff03a
#define CYREG_SFLASH_PROT_ROW59 0x0ffff03b
#define CYREG_SFLASH_PROT_ROW60 0x0ffff03c
#define CYREG_SFLASH_PROT_ROW61 0x0ffff03d
#define CYREG_SFLASH_PROT_ROW62 0x0ffff03e
#define CYREG_SFLASH_PROT_ROW63 0x0ffff03f
#define CYREG_SFLASH_PROT_PROTECTION 0x0ffff07f
#define CYREG_SFLASH_AV_PAIRS_8B000 0x0ffff080
#define CYREG_SFLASH_AV_PAIRS_8B001 0x0ffff081
#define CYREG_SFLASH_AV_PAIRS_8B002 0x0ffff082
#define CYREG_SFLASH_AV_PAIRS_8B003 0x0ffff083
#define CYREG_SFLASH_AV_PAIRS_8B004 0x0ffff084
#define CYREG_SFLASH_AV_PAIRS_8B005 0x0ffff085
#define CYREG_SFLASH_AV_PAIRS_8B006 0x0ffff086
#define CYREG_SFLASH_AV_PAIRS_8B007 0x0ffff087
#define CYREG_SFLASH_AV_PAIRS_8B008 0x0ffff088
#define CYREG_SFLASH_AV_PAIRS_8B009 0x0ffff089
#define CYREG_SFLASH_AV_PAIRS_8B010 0x0ffff08a
#define CYREG_SFLASH_AV_PAIRS_8B011 0x0ffff08b
#define CYREG_SFLASH_AV_PAIRS_8B012 0x0ffff08c
#define CYREG_SFLASH_AV_PAIRS_8B013 0x0ffff08d
#define CYREG_SFLASH_AV_PAIRS_8B014 0x0ffff08e
#define CYREG_SFLASH_AV_PAIRS_8B015 0x0ffff08f
#define CYREG_SFLASH_AV_PAIRS_8B016 0x0ffff090
#define CYREG_SFLASH_AV_PAIRS_8B017 0x0ffff091
#define CYREG_SFLASH_AV_PAIRS_8B018 0x0ffff092
#define CYREG_SFLASH_AV_PAIRS_8B019 0x0ffff093
#define CYREG_SFLASH_AV_PAIRS_8B020 0x0ffff094
#define CYREG_SFLASH_AV_PAIRS_8B021 0x0ffff095
#define CYREG_SFLASH_AV_PAIRS_8B022 0x0ffff096
#define CYREG_SFLASH_AV_PAIRS_8B023 0x0ffff097
#define CYREG_SFLASH_AV_PAIRS_8B024 0x0ffff098
#define CYREG_SFLASH_AV_PAIRS_8B025 0x0ffff099
#define CYREG_SFLASH_AV_PAIRS_8B026 0x0ffff09a
#define CYREG_SFLASH_AV_PAIRS_8B027 0x0ffff09b
#define CYREG_SFLASH_AV_PAIRS_8B028 0x0ffff09c
#define CYREG_SFLASH_AV_PAIRS_8B029 0x0ffff09d
#define CYREG_SFLASH_AV_PAIRS_8B030 0x0ffff09e
#define CYREG_SFLASH_AV_PAIRS_8B031 0x0ffff09f
#define CYREG_SFLASH_AV_PAIRS_8B032 0x0ffff0a0
#define CYREG_SFLASH_AV_PAIRS_8B033 0x0ffff0a1
#define CYREG_SFLASH_AV_PAIRS_8B034 0x0ffff0a2
#define CYREG_SFLASH_AV_PAIRS_8B035 0x0ffff0a3
#define CYREG_SFLASH_AV_PAIRS_8B036 0x0ffff0a4
#define CYREG_SFLASH_AV_PAIRS_8B037 0x0ffff0a5
#define CYREG_SFLASH_AV_PAIRS_8B038 0x0ffff0a6
#define CYREG_SFLASH_AV_PAIRS_8B039 0x0ffff0a7
#define CYREG_SFLASH_AV_PAIRS_8B040 0x0ffff0a8
#define CYREG_SFLASH_AV_PAIRS_8B041 0x0ffff0a9
#define CYREG_SFLASH_AV_PAIRS_8B042 0x0ffff0aa
#define CYREG_SFLASH_AV_PAIRS_8B043 0x0ffff0ab
#define CYREG_SFLASH_AV_PAIRS_8B044 0x0ffff0ac
#define CYREG_SFLASH_AV_PAIRS_8B045 0x0ffff0ad
#define CYREG_SFLASH_AV_PAIRS_8B046 0x0ffff0ae
#define CYREG_SFLASH_AV_PAIRS_8B047 0x0ffff0af
#define CYREG_SFLASH_AV_PAIRS_8B048 0x0ffff0b0
#define CYREG_SFLASH_AV_PAIRS_8B049 0x0ffff0b1
#define CYREG_SFLASH_AV_PAIRS_8B050 0x0ffff0b2
#define CYREG_SFLASH_AV_PAIRS_8B051 0x0ffff0b3
#define CYREG_SFLASH_AV_PAIRS_8B052 0x0ffff0b4
#define CYREG_SFLASH_AV_PAIRS_8B053 0x0ffff0b5
#define CYREG_SFLASH_AV_PAIRS_8B054 0x0ffff0b6
#define CYREG_SFLASH_AV_PAIRS_8B055 0x0ffff0b7
#define CYREG_SFLASH_AV_PAIRS_8B056 0x0ffff0b8
#define CYREG_SFLASH_AV_PAIRS_8B057 0x0ffff0b9
#define CYREG_SFLASH_AV_PAIRS_8B058 0x0ffff0ba
#define CYREG_SFLASH_AV_PAIRS_8B059 0x0ffff0bb
#define CYREG_SFLASH_AV_PAIRS_8B060 0x0ffff0bc
#define CYREG_SFLASH_AV_PAIRS_8B061 0x0ffff0bd
#define CYREG_SFLASH_AV_PAIRS_8B062 0x0ffff0be
#define CYREG_SFLASH_AV_PAIRS_8B063 0x0ffff0bf
#define CYREG_SFLASH_AV_PAIRS_8B064 0x0ffff0c0
#define CYREG_SFLASH_AV_PAIRS_8B065 0x0ffff0c1
#define CYREG_SFLASH_AV_PAIRS_8B066 0x0ffff0c2
#define CYREG_SFLASH_AV_PAIRS_8B067 0x0ffff0c3
#define CYREG_SFLASH_AV_PAIRS_8B068 0x0ffff0c4
#define CYREG_SFLASH_AV_PAIRS_8B069 0x0ffff0c5
#define CYREG_SFLASH_AV_PAIRS_8B070 0x0ffff0c6
#define CYREG_SFLASH_AV_PAIRS_8B071 0x0ffff0c7
#define CYREG_SFLASH_AV_PAIRS_8B072 0x0ffff0c8
#define CYREG_SFLASH_AV_PAIRS_8B073 0x0ffff0c9
#define CYREG_SFLASH_AV_PAIRS_8B074 0x0ffff0ca
#define CYREG_SFLASH_AV_PAIRS_8B075 0x0ffff0cb
#define CYREG_SFLASH_AV_PAIRS_8B076 0x0ffff0cc
#define CYREG_SFLASH_AV_PAIRS_8B077 0x0ffff0cd
#define CYREG_SFLASH_AV_PAIRS_8B078 0x0ffff0ce
#define CYREG_SFLASH_AV_PAIRS_8B079 0x0ffff0cf
#define CYREG_SFLASH_AV_PAIRS_8B080 0x0ffff0d0
#define CYREG_SFLASH_AV_PAIRS_8B081 0x0ffff0d1
#define CYREG_SFLASH_AV_PAIRS_8B082 0x0ffff0d2
#define CYREG_SFLASH_AV_PAIRS_8B083 0x0ffff0d3
#define CYREG_SFLASH_AV_PAIRS_8B084 0x0ffff0d4
#define CYREG_SFLASH_AV_PAIRS_8B085 0x0ffff0d5
#define CYREG_SFLASH_AV_PAIRS_8B086 0x0ffff0d6
#define CYREG_SFLASH_AV_PAIRS_8B087 0x0ffff0d7
#define CYREG_SFLASH_AV_PAIRS_8B088 0x0ffff0d8
#define CYREG_SFLASH_AV_PAIRS_8B089 0x0ffff0d9
#define CYREG_SFLASH_AV_PAIRS_8B090 0x0ffff0da
#define CYREG_SFLASH_AV_PAIRS_8B091 0x0ffff0db
#define CYREG_SFLASH_AV_PAIRS_8B092 0x0ffff0dc
#define CYREG_SFLASH_AV_PAIRS_8B093 0x0ffff0dd
#define CYREG_SFLASH_AV_PAIRS_8B094 0x0ffff0de
#define CYREG_SFLASH_AV_PAIRS_8B095 0x0ffff0df
#define CYREG_SFLASH_AV_PAIRS_8B096 0x0ffff0e0
#define CYREG_SFLASH_AV_PAIRS_8B097 0x0ffff0e1
#define CYREG_SFLASH_AV_PAIRS_8B098 0x0ffff0e2
#define CYREG_SFLASH_AV_PAIRS_8B099 0x0ffff0e3
#define CYREG_SFLASH_AV_PAIRS_8B100 0x0ffff0e4
#define CYREG_SFLASH_AV_PAIRS_8B101 0x0ffff0e5
#define CYREG_SFLASH_AV_PAIRS_8B102 0x0ffff0e6
#define CYREG_SFLASH_AV_PAIRS_8B103 0x0ffff0e7
#define CYREG_SFLASH_AV_PAIRS_8B104 0x0ffff0e8
#define CYREG_SFLASH_AV_PAIRS_8B105 0x0ffff0e9
#define CYREG_SFLASH_AV_PAIRS_8B106 0x0ffff0ea
#define CYREG_SFLASH_AV_PAIRS_8B107 0x0ffff0eb
#define CYREG_SFLASH_AV_PAIRS_8B108 0x0ffff0ec
#define CYREG_SFLASH_AV_PAIRS_8B109 0x0ffff0ed
#define CYREG_SFLASH_AV_PAIRS_8B110 0x0ffff0ee
#define CYREG_SFLASH_AV_PAIRS_8B111 0x0ffff0ef
#define CYREG_SFLASH_AV_PAIRS_8B112 0x0ffff0f0
#define CYREG_SFLASH_AV_PAIRS_8B113 0x0ffff0f1
#define CYREG_SFLASH_AV_PAIRS_8B114 0x0ffff0f2
#define CYREG_SFLASH_AV_PAIRS_8B115 0x0ffff0f3
#define CYREG_SFLASH_AV_PAIRS_8B116 0x0ffff0f4
#define CYREG_SFLASH_AV_PAIRS_8B117 0x0ffff0f5
#define CYREG_SFLASH_AV_PAIRS_8B118 0x0ffff0f6
#define CYREG_SFLASH_AV_PAIRS_8B119 0x0ffff0f7
#define CYREG_SFLASH_AV_PAIRS_8B120 0x0ffff0f8
#define CYREG_SFLASH_AV_PAIRS_8B121 0x0ffff0f9
#define CYREG_SFLASH_AV_PAIRS_8B122 0x0ffff0fa
#define CYREG_SFLASH_AV_PAIRS_8B123 0x0ffff0fb
#define CYREG_SFLASH_AV_PAIRS_8B124 0x0ffff0fc
#define CYREG_SFLASH_AV_PAIRS_8B125 0x0ffff0fd
#define CYREG_SFLASH_AV_PAIRS_8B126 0x0ffff0fe
#define CYREG_SFLASH_AV_PAIRS_8B127 0x0ffff0ff
#define CYREG_SFLASH_AV_PAIRS_32B00 0x0ffff100
#define CYREG_SFLASH_AV_PAIRS_32B01 0x0ffff104
#define CYREG_SFLASH_AV_PAIRS_32B02 0x0ffff108
#define CYREG_SFLASH_AV_PAIRS_32B03 0x0ffff10c
#define CYREG_SFLASH_AV_PAIRS_32B04 0x0ffff110
#define CYREG_SFLASH_AV_PAIRS_32B05 0x0ffff114
#define CYREG_SFLASH_AV_PAIRS_32B06 0x0ffff118
#define CYREG_SFLASH_AV_PAIRS_32B07 0x0ffff11c
#define CYREG_SFLASH_AV_PAIRS_32B08 0x0ffff120
#define CYREG_SFLASH_AV_PAIRS_32B09 0x0ffff124
#define CYREG_SFLASH_AV_PAIRS_32B10 0x0ffff128
#define CYREG_SFLASH_AV_PAIRS_32B11 0x0ffff12c
#define CYREG_SFLASH_AV_PAIRS_32B12 0x0ffff130
#define CYREG_SFLASH_AV_PAIRS_32B13 0x0ffff134
#define CYREG_SFLASH_AV_PAIRS_32B14 0x0ffff138
#define CYREG_SFLASH_AV_PAIRS_32B15 0x0ffff13c
#define CYREG_SFLASH_CPUSS_WOUNDING 0x0ffff140
#define CYREG_SFLASH_SILICON_ID 0x0ffff144
#define CYREG_SFLASH_CPUSS_PRIV_RAM 0x0ffff148
#define CYREG_SFLASH_CPUSS_PRIV_FLASH 0x0ffff14c
#define CYREG_SFLASH_HIB_KEY_DELAY 0x0ffff150
#define CYREG_SFLASH_DPSLP_KEY_DELAY 0x0ffff152
#define CYREG_SFLASH_SWD_CONFIG 0x0ffff154
#define CYREG_SFLASH_SWD_LISTEN 0x0ffff158
#define CYREG_SFLASH_FLASH_START 0x0ffff15c
#define CYREG_SFLASH_CSD_TRIM1_HVIDAC 0x0ffff160
#define CYREG_SFLASH_CSD_TRIM2_HVIDAC 0x0ffff161
#define CYREG_SFLASH_CSD_TRIM1_CSD 0x0ffff162
#define CYREG_SFLASH_CSD_TRIM2_CSD 0x0ffff163
#define CYREG_SFLASH_SAR_TEMP_MULTIPLIER 0x0ffff164
#define CYREG_SFLASH_SAR_TEMP_OFFSET 0x0ffff166
#define CYREG_SFLASH_SKIP_CHECKSUM 0x0ffff169
#define CYREG_SFLASH_PROT_VIRGINKEY0 0x0ffff170
#define CYREG_SFLASH_PROT_VIRGINKEY1 0x0ffff171
#define CYREG_SFLASH_PROT_VIRGINKEY2 0x0ffff172
#define CYREG_SFLASH_PROT_VIRGINKEY3 0x0ffff173
#define CYREG_SFLASH_PROT_VIRGINKEY4 0x0ffff174
#define CYREG_SFLASH_PROT_VIRGINKEY5 0x0ffff175
#define CYREG_SFLASH_PROT_VIRGINKEY6 0x0ffff176
#define CYREG_SFLASH_PROT_VIRGINKEY7 0x0ffff177
#define CYREG_SFLASH_DIE_LOT0 0x0ffff178
#define CYREG_SFLASH_DIE_LOT1 0x0ffff179
#define CYREG_SFLASH_DIE_LOT2 0x0ffff17a
#define CYREG_SFLASH_DIE_WAFER 0x0ffff17b
#define CYREG_SFLASH_DIE_X 0x0ffff17c
#define CYREG_SFLASH_DIE_Y 0x0ffff17d
#define CYREG_SFLASH_DIE_SORT 0x0ffff17e
#define CYREG_SFLASH_DIE_MINOR 0x0ffff17f
#define CYREG_SFLASH_PE_TE_DATA00 0x0ffff180
#define CYREG_SFLASH_PE_TE_DATA01 0x0ffff181
#define CYREG_SFLASH_PE_TE_DATA02 0x0ffff182
#define CYREG_SFLASH_PE_TE_DATA03 0x0ffff183
#define CYREG_SFLASH_PE_TE_DATA04 0x0ffff184
#define CYREG_SFLASH_PE_TE_DATA05 0x0ffff185
#define CYREG_SFLASH_PE_TE_DATA06 0x0ffff186
#define CYREG_SFLASH_PE_TE_DATA07 0x0ffff187
#define CYREG_SFLASH_PE_TE_DATA08 0x0ffff188
#define CYREG_SFLASH_PE_TE_DATA09 0x0ffff189
#define CYREG_SFLASH_PE_TE_DATA10 0x0ffff18a
#define CYREG_SFLASH_PE_TE_DATA11 0x0ffff18b
#define CYREG_SFLASH_PE_TE_DATA12 0x0ffff18c
#define CYREG_SFLASH_PE_TE_DATA13 0x0ffff18d
#define CYREG_SFLASH_PE_TE_DATA14 0x0ffff18e
#define CYREG_SFLASH_PE_TE_DATA15 0x0ffff18f
#define CYREG_SFLASH_PE_TE_DATA16 0x0ffff190
#define CYREG_SFLASH_PE_TE_DATA17 0x0ffff191
#define CYREG_SFLASH_PE_TE_DATA18 0x0ffff192
#define CYREG_SFLASH_PE_TE_DATA19 0x0ffff193
#define CYREG_SFLASH_PE_TE_DATA20 0x0ffff194
#define CYREG_SFLASH_PE_TE_DATA21 0x0ffff195
#define CYREG_SFLASH_PE_TE_DATA22 0x0ffff196
#define CYREG_SFLASH_PE_TE_DATA23 0x0ffff197
#define CYREG_SFLASH_PE_TE_DATA24 0x0ffff198
#define CYREG_SFLASH_PE_TE_DATA25 0x0ffff199
#define CYREG_SFLASH_PE_TE_DATA26 0x0ffff19a
#define CYREG_SFLASH_PE_TE_DATA27 0x0ffff19b
#define CYREG_SFLASH_PE_TE_DATA28 0x0ffff19c
#define CYREG_SFLASH_PE_TE_DATA29 0x0ffff19d
#define CYREG_SFLASH_PE_TE_DATA30 0x0ffff19e
#define CYREG_SFLASH_PE_TE_DATA31 0x0ffff19f
#define CYREG_SFLASH_PP 0x0ffff1a0
#define CYREG_SFLASH_E 0x0ffff1a4
#define CYREG_SFLASH_P 0x0ffff1a8
#define CYREG_SFLASH_EA_E 0x0ffff1ac
#define CYREG_SFLASH_EA_P 0x0ffff1b0
#define CYREG_SFLASH_ES_E 0x0ffff1b4
#define CYREG_SFLASH_ES_P_EO 0x0ffff1b8
#define CYREG_SFLASH_E_VCTAT 0x0ffff1bc
#define CYREG_SFLASH_P_VCTAT 0x0ffff1bd
#define CYREG_SFLASH_MARGIN 0x0ffff1be
#define CYREG_SFLASH_SPCIF_TRIM1 0x0ffff1bf
#define CYREG_SFLASH_IMO_MAXF0 0x0ffff1c0
#define CYREG_SFLASH_IMO_ABS0 0x0ffff1c1
#define CYREG_SFLASH_IMO_TMPCO0 0x0ffff1c2
#define CYREG_SFLASH_IMO_MAXF1 0x0ffff1c3
#define CYREG_SFLASH_IMO_ABS1 0x0ffff1c4
#define CYREG_SFLASH_IMO_TMPCO1 0x0ffff1c5
#define CYREG_SFLASH_IMO_MAXF2 0x0ffff1c6
#define CYREG_SFLASH_IMO_ABS2 0x0ffff1c7
#define CYREG_SFLASH_IMO_TMPCO2 0x0ffff1c8
#define CYREG_SFLASH_IMO_MAXF3 0x0ffff1c9
#define CYREG_SFLASH_IMO_ABS3 0x0ffff1ca
#define CYREG_SFLASH_IMO_TMPCO3 0x0ffff1cb
#define CYREG_SFLASH_IMO_ABS4 0x0ffff1cc
#define CYREG_SFLASH_IMO_TMPCO4 0x0ffff1cd
#define CYREG_SFLASH_IMO_TRIM00 0x0ffff1d0
#define CYREG_SFLASH_IMO_TRIM01 0x0ffff1d1
#define CYREG_SFLASH_IMO_TRIM02 0x0ffff1d2
#define CYREG_SFLASH_IMO_TRIM03 0x0ffff1d3
#define CYREG_SFLASH_IMO_TRIM04 0x0ffff1d4
#define CYREG_SFLASH_IMO_TRIM05 0x0ffff1d5
#define CYREG_SFLASH_IMO_TRIM06 0x0ffff1d6
#define CYREG_SFLASH_IMO_TRIM07 0x0ffff1d7
#define CYREG_SFLASH_IMO_TRIM08 0x0ffff1d8
#define CYREG_SFLASH_IMO_TRIM09 0x0ffff1d9
#define CYREG_SFLASH_IMO_TRIM10 0x0ffff1da
#define CYREG_SFLASH_IMO_TRIM11 0x0ffff1db
#define CYREG_SFLASH_IMO_TRIM12 0x0ffff1dc
#define CYREG_SFLASH_IMO_TRIM13 0x0ffff1dd
#define CYREG_SFLASH_IMO_TRIM14 0x0ffff1de
#define CYREG_SFLASH_IMO_TRIM15 0x0ffff1df
#define CYREG_SFLASH_IMO_TRIM16 0x0ffff1e0
#define CYREG_SFLASH_IMO_TRIM17 0x0ffff1e1
#define CYREG_SFLASH_IMO_TRIM18 0x0ffff1e2
#define CYREG_SFLASH_IMO_TRIM19 0x0ffff1e3
#define CYREG_SFLASH_IMO_TRIM20 0x0ffff1e4
#define CYREG_SFLASH_IMO_TRIM21 0x0ffff1e5
#define CYREG_SFLASH_IMO_TRIM22 0x0ffff1e6
#define CYREG_SFLASH_IMO_TRIM23 0x0ffff1e7
#define CYREG_SFLASH_IMO_TRIM24 0x0ffff1e8
#define CYREG_SFLASH_IMO_TRIM25 0x0ffff1e9
#define CYREG_SFLASH_IMO_TRIM26 0x0ffff1ea
#define CYREG_SFLASH_IMO_TRIM27 0x0ffff1eb
#define CYREG_SFLASH_IMO_TRIM28 0x0ffff1ec
#define CYREG_SFLASH_IMO_TRIM29 0x0ffff1ed
#define CYREG_SFLASH_IMO_TRIM30 0x0ffff1ee
#define CYREG_SFLASH_IMO_TRIM31 0x0ffff1ef
#define CYREG_SFLASH_IMO_TRIM32 0x0ffff1f0
#define CYREG_SFLASH_IMO_TRIM33 0x0ffff1f1
#define CYREG_SFLASH_IMO_TRIM34 0x0ffff1f2
#define CYREG_SFLASH_IMO_TRIM35 0x0ffff1f3
#define CYREG_SFLASH_IMO_TRIM36 0x0ffff1f4
#define CYREG_SFLASH_IMO_TRIM37 0x0ffff1f5
#define CYREG_SFLASH_IMO_TRIM38 0x0ffff1f6
#define CYREG_SFLASH_IMO_TRIM39 0x0ffff1f7
#define CYREG_SFLASH_IMO_TRIM40 0x0ffff1f8
#define CYREG_SFLASH_IMO_TRIM41 0x0ffff1f9
#define CYREG_SFLASH_IMO_TRIM42 0x0ffff1fa
#define CYREG_SFLASH_IMO_TRIM43 0x0ffff1fb
#define CYREG_SFLASH_IMO_TRIM44 0x0ffff1fc
#define CYREG_SFLASH_IMO_TRIM45 0x0ffff1fd
#define CYREG_SFLASH_CHECKSUM 0x0ffff1fe
#define CYDEV_SROM_BASE 0x10000000
#define CYDEV_SROM_SIZE 0x00001000
#define CYREG_SROM_DATA_MBASE 0x10000000
#define CYREG_SROM_DATA_MSIZE 0x00001000
#define CYDEV_SRAM_BASE 0x20000000
#define CYDEV_SRAM_SIZE 0x00001000
#define CYREG_SRAM_DATA_MBASE 0x20000000
#define CYREG_SRAM_DATA_MSIZE 0x00001000
#define CYDEV_CPUSS_BASE 0x40000000
#define CYDEV_CPUSS_SIZE 0x00010000
#define CYREG_CPUSS_CONFIG 0x40000000
#define CYREG_CPUSS_SYSREQ 0x40000004
#define CYREG_CPUSS_SYSARG 0x40000008
#define CYREG_CPUSS_PROTECTION 0x4000000c
#define CYREG_CPUSS_PRIV_ROM 0x40000010
#define CYREG_CPUSS_PRIV_RAM 0x40000014
#define CYREG_CPUSS_PRIV_FLASH 0x40000018
#define CYREG_CPUSS_WOUNDING 0x4000001c
#define CYREG_CPUSS_INTR_SELECT 0x40000020
#define CYDEV_HSIOM_BASE 0x40010000
#define CYDEV_HSIOM_SIZE 0x00001000
#define CYREG_HSIOM_PORT_SEL0 0x40010000
#define CYREG_HSIOM_PORT_SEL1 0x40010004
#define CYREG_HSIOM_PORT_SEL2 0x40010008
#define CYREG_HSIOM_PORT_SEL3 0x4001000c
#define CYREG_HSIOM_PORT_SEL4 0x40010010
#define CYDEV_CLK_BASE 0x40020000
#define CYDEV_CLK_SIZE 0x00010000
#define CYREG_CLK_DIVIDER_A00 0x40020000
#define CYREG_CLK_DIVIDER_A01 0x40020004
#define CYREG_CLK_DIVIDER_A02 0x40020008
#define CYREG_CLK_DIVIDER_B00 0x40020040
#define CYREG_CLK_DIVIDER_B01 0x40020044
#define CYREG_CLK_DIVIDER_B02 0x40020048
#define CYREG_CLK_DIVIDER_C00 0x40020080
#define CYREG_CLK_DIVIDER_C01 0x40020084
#define CYREG_CLK_DIVIDER_C02 0x40020088
#define CYREG_CLK_DIVIDER_FRAC_A00 0x40020100
#define CYREG_CLK_DIVIDER_FRAC_B00 0x40020140
#define CYREG_CLK_DIVIDER_FRAC_C00 0x40020180
#define CYREG_CLK_SELECT00 0x40020200
#define CYREG_CLK_SELECT01 0x40020204
#define CYREG_CLK_SELECT02 0x40020208
#define CYREG_CLK_SELECT03 0x4002020c
#define CYREG_CLK_SELECT04 0x40020210
#define CYREG_CLK_SELECT05 0x40020214
#define CYREG_CLK_SELECT06 0x40020218
#define CYREG_CLK_SELECT07 0x4002021c
#define CYREG_CLK_SELECT08 0x40020220
#define CYREG_CLK_SELECT09 0x40020224
#define CYREG_CLK_SELECT10 0x40020228
#define CYREG_CLK_SELECT11 0x4002022c
#define CYREG_CLK_SELECT12 0x40020230
#define CYREG_CLK_SELECT13 0x40020234
#define CYREG_CLK_SELECT14 0x40020238
#define CYREG_CLK_SELECT15 0x4002023c
#define CYDEV_TST_BASE 0x40030000
#define CYDEV_TST_SIZE 0x00010000
#define CYREG_TST_MODE 0x40030014
#define CYDEV_PRT0_BASE 0x40040000
#define CYDEV_PRT0_SIZE 0x00000100
#define CYREG_PRT0_DR 0x40040000
#define CYREG_PRT0_PS 0x40040004
#define CYREG_PRT0_PC 0x40040008
#define CYREG_PRT0_INTCFG 0x4004000c
#define CYREG_PRT0_INTSTAT 0x40040010
#define CYREG_PRT0_PC2 0x40040018
#define CYDEV_PRT1_BASE 0x40040100
#define CYDEV_PRT1_SIZE 0x00000100
#define CYREG_PRT1_DR 0x40040100
#define CYREG_PRT1_PS 0x40040104
#define CYREG_PRT1_PC 0x40040108
#define CYREG_PRT1_INTCFG 0x4004010c
#define CYREG_PRT1_INTSTAT 0x40040110
#define CYREG_PRT1_PC2 0x40040118
#define CYDEV_PRT2_BASE 0x40040200
#define CYDEV_PRT2_SIZE 0x00000100
#define CYREG_PRT2_DR 0x40040200
#define CYREG_PRT2_PS 0x40040204
#define CYREG_PRT2_PC 0x40040208
#define CYREG_PRT2_INTCFG 0x4004020c
#define CYREG_PRT2_INTSTAT 0x40040210
#define CYREG_PRT2_PC2 0x40040218
#define CYDEV_PRT3_BASE 0x40040300
#define CYDEV_PRT3_SIZE 0x00000100
#define CYREG_PRT3_DR 0x40040300
#define CYREG_PRT3_PS 0x40040304
#define CYREG_PRT3_PC 0x40040308
#define CYREG_PRT3_INTCFG 0x4004030c
#define CYREG_PRT3_INTSTAT 0x40040310
#define CYREG_PRT3_PC2 0x40040318
#define CYDEV_PRT4_BASE 0x40040400
#define CYDEV_PRT4_SIZE 0x00000100
#define CYREG_PRT4_DR 0x40040400
#define CYREG_PRT4_PS 0x40040404
#define CYREG_PRT4_PC 0x40040408
#define CYREG_PRT4_INTCFG 0x4004040c
#define CYREG_PRT4_INTSTAT 0x40040410
#define CYREG_PRT4_PC2 0x40040418
#define CYDEV_TCPWM_BASE 0x40050000
#define CYDEV_TCPWM_SIZE 0x00001000
#define CYREG_TCPWM_CTRL 0x40050000
#define CYREG_TCPWM_CMD 0x40050008
#define CYREG_TCPWM_INTR_CAUSE 0x4005000c
#define CYDEV_TCPWM_CNT0_BASE 0x40050100
#define CYDEV_TCPWM_CNT0_SIZE 0x00000040
#define CYREG_TCPWM_CNT0_CTRL 0x40050100
#define CYREG_TCPWM_CNT0_STATUS 0x40050104
#define CYREG_TCPWM_CNT0_COUNTER 0x40050108
#define CYREG_TCPWM_CNT0_CC 0x4005010c
#define CYREG_TCPWM_CNT0_CC_BUFF 0x40050110
#define CYREG_TCPWM_CNT0_PERIOD 0x40050114
#define CYREG_TCPWM_CNT0_PERIOD_BUFF 0x40050118
#define CYREG_TCPWM_CNT0_TR_CTRL0 0x40050120
#define CYREG_TCPWM_CNT0_TR_CTRL1 0x40050124
#define CYREG_TCPWM_CNT0_TR_CTRL2 0x40050128
#define CYREG_TCPWM_CNT0_INTR 0x40050130
#define CYREG_TCPWM_CNT0_INTR_SET 0x40050134
#define CYREG_TCPWM_CNT0_INTR_MASK 0x40050138
#define CYREG_TCPWM_CNT0_INTR_MASKED 0x4005013c
#define CYDEV_TCPWM_CNT1_BASE 0x40050140
#define CYDEV_TCPWM_CNT1_SIZE 0x00000040
#define CYREG_TCPWM_CNT1_CTRL 0x40050140
#define CYREG_TCPWM_CNT1_STATUS 0x40050144
#define CYREG_TCPWM_CNT1_COUNTER 0x40050148
#define CYREG_TCPWM_CNT1_CC 0x4005014c
#define CYREG_TCPWM_CNT1_CC_BUFF 0x40050150
#define CYREG_TCPWM_CNT1_PERIOD 0x40050154
#define CYREG_TCPWM_CNT1_PERIOD_BUFF 0x40050158
#define CYREG_TCPWM_CNT1_TR_CTRL0 0x40050160
#define CYREG_TCPWM_CNT1_TR_CTRL1 0x40050164
#define CYREG_TCPWM_CNT1_TR_CTRL2 0x40050168
#define CYREG_TCPWM_CNT1_INTR 0x40050170
#define CYREG_TCPWM_CNT1_INTR_SET 0x40050174
#define CYREG_TCPWM_CNT1_INTR_MASK 0x40050178
#define CYREG_TCPWM_CNT1_INTR_MASKED 0x4005017c
#define CYDEV_TCPWM_CNT2_BASE 0x40050180
#define CYDEV_TCPWM_CNT2_SIZE 0x00000040
#define CYREG_TCPWM_CNT2_CTRL 0x40050180
#define CYREG_TCPWM_CNT2_STATUS 0x40050184
#define CYREG_TCPWM_CNT2_COUNTER 0x40050188
#define CYREG_TCPWM_CNT2_CC 0x4005018c
#define CYREG_TCPWM_CNT2_CC_BUFF 0x40050190
#define CYREG_TCPWM_CNT2_PERIOD 0x40050194
#define CYREG_TCPWM_CNT2_PERIOD_BUFF 0x40050198
#define CYREG_TCPWM_CNT2_TR_CTRL0 0x400501a0
#define CYREG_TCPWM_CNT2_TR_CTRL1 0x400501a4
#define CYREG_TCPWM_CNT2_TR_CTRL2 0x400501a8
#define CYREG_TCPWM_CNT2_INTR 0x400501b0
#define CYREG_TCPWM_CNT2_INTR_SET 0x400501b4
#define CYREG_TCPWM_CNT2_INTR_MASK 0x400501b8
#define CYREG_TCPWM_CNT2_INTR_MASKED 0x400501bc
#define CYDEV_TCPWM_CNT3_BASE 0x400501c0
#define CYDEV_TCPWM_CNT3_SIZE 0x00000040
#define CYREG_TCPWM_CNT3_CTRL 0x400501c0
#define CYREG_TCPWM_CNT3_STATUS 0x400501c4
#define CYREG_TCPWM_CNT3_COUNTER 0x400501c8
#define CYREG_TCPWM_CNT3_CC 0x400501cc
#define CYREG_TCPWM_CNT3_CC_BUFF 0x400501d0
#define CYREG_TCPWM_CNT3_PERIOD 0x400501d4
#define CYREG_TCPWM_CNT3_PERIOD_BUFF 0x400501d8
#define CYREG_TCPWM_CNT3_TR_CTRL0 0x400501e0
#define CYREG_TCPWM_CNT3_TR_CTRL1 0x400501e4
#define CYREG_TCPWM_CNT3_TR_CTRL2 0x400501e8
#define CYREG_TCPWM_CNT3_INTR 0x400501f0
#define CYREG_TCPWM_CNT3_INTR_SET 0x400501f4
#define CYREG_TCPWM_CNT3_INTR_MASK 0x400501f8
#define CYREG_TCPWM_CNT3_INTR_MASKED 0x400501fc
#define CYDEV_SCB0_BASE 0x40060000
#define CYDEV_SCB0_SIZE 0x00010000
#define CYREG_SCB0_CTRL 0x40060000
#define CYREG_SCB0_STATUS 0x40060004
#define CYREG_SCB0_SPI_CTRL 0x40060020
#define CYREG_SCB0_SPI_STATUS 0x40060024
#define CYREG_SCB0_UART_CTRL 0x40060040
#define CYREG_SCB0_UART_TX_CTRL 0x40060044
#define CYREG_SCB0_UART_RX_CTRL 0x40060048
#define CYREG_SCB0_UART_RX_STATUS 0x4006004c
#define CYREG_SCB0_I2C_CTRL 0x40060060
#define CYREG_SCB0_I2C_STATUS 0x40060064
#define CYREG_SCB0_I2C_M_CMD 0x40060068
#define CYREG_SCB0_I2C_S_CMD 0x4006006c
#define CYREG_SCB0_I2C_CFG 0x40060070
#define CYREG_SCB0_BIST_CONTROL 0x40060100
#define CYREG_SCB0_BIST_DATA 0x40060104
#define CYREG_SCB0_TX_CTRL 0x40060200
#define CYREG_SCB0_TX_FIFO_CTRL 0x40060204
#define CYREG_SCB0_TX_FIFO_STATUS 0x40060208
#define CYREG_SCB0_TX_FIFO_WR 0x40060240
#define CYREG_SCB0_RX_CTRL 0x40060300
#define CYREG_SCB0_RX_FIFO_CTRL 0x40060304
#define CYREG_SCB0_RX_FIFO_STATUS 0x40060308
#define CYREG_SCB0_RX_MATCH 0x40060310
#define CYREG_SCB0_RX_FIFO_RD 0x40060340
#define CYREG_SCB0_RX_FIFO_RD_SILENT 0x40060344
#define CYREG_SCB0_EZ_DATA00 0x40060400
#define CYREG_SCB0_EZ_DATA01 0x40060404
#define CYREG_SCB0_EZ_DATA02 0x40060408
#define CYREG_SCB0_EZ_DATA03 0x4006040c
#define CYREG_SCB0_EZ_DATA04 0x40060410
#define CYREG_SCB0_EZ_DATA05 0x40060414
#define CYREG_SCB0_EZ_DATA06 0x40060418
#define CYREG_SCB0_EZ_DATA07 0x4006041c
#define CYREG_SCB0_EZ_DATA08 0x40060420
#define CYREG_SCB0_EZ_DATA09 0x40060424
#define CYREG_SCB0_EZ_DATA10 0x40060428
#define CYREG_SCB0_EZ_DATA11 0x4006042c
#define CYREG_SCB0_EZ_DATA12 0x40060430
#define CYREG_SCB0_EZ_DATA13 0x40060434
#define CYREG_SCB0_EZ_DATA14 0x40060438
#define CYREG_SCB0_EZ_DATA15 0x4006043c
#define CYREG_SCB0_EZ_DATA16 0x40060440
#define CYREG_SCB0_EZ_DATA17 0x40060444
#define CYREG_SCB0_EZ_DATA18 0x40060448
#define CYREG_SCB0_EZ_DATA19 0x4006044c
#define CYREG_SCB0_EZ_DATA20 0x40060450
#define CYREG_SCB0_EZ_DATA21 0x40060454
#define CYREG_SCB0_EZ_DATA22 0x40060458
#define CYREG_SCB0_EZ_DATA23 0x4006045c
#define CYREG_SCB0_EZ_DATA24 0x40060460
#define CYREG_SCB0_EZ_DATA25 0x40060464
#define CYREG_SCB0_EZ_DATA26 0x40060468
#define CYREG_SCB0_EZ_DATA27 0x4006046c
#define CYREG_SCB0_EZ_DATA28 0x40060470
#define CYREG_SCB0_EZ_DATA29 0x40060474
#define CYREG_SCB0_EZ_DATA30 0x40060478
#define CYREG_SCB0_EZ_DATA31 0x4006047c
#define CYREG_SCB0_INTR_CAUSE 0x40060e00
#define CYREG_SCB0_INTR_I2C_EC 0x40060e80
#define CYREG_SCB0_INTR_I2C_EC_MASK 0x40060e88
#define CYREG_SCB0_INTR_I2C_EC_MASKED 0x40060e8c
#define CYREG_SCB0_INTR_SPI_EC 0x40060ec0
#define CYREG_SCB0_INTR_SPI_EC_MASK 0x40060ec8
#define CYREG_SCB0_INTR_SPI_EC_MASKED 0x40060ecc
#define CYREG_SCB0_INTR_M 0x40060f00
#define CYREG_SCB0_INTR_M_SET 0x40060f04
#define CYREG_SCB0_INTR_M_MASK 0x40060f08
#define CYREG_SCB0_INTR_M_MASKED 0x40060f0c
#define CYREG_SCB0_INTR_S 0x40060f40
#define CYREG_SCB0_INTR_S_SET 0x40060f44
#define CYREG_SCB0_INTR_S_MASK 0x40060f48
#define CYREG_SCB0_INTR_S_MASKED 0x40060f4c
#define CYREG_SCB0_INTR_TX 0x40060f80
#define CYREG_SCB0_INTR_TX_SET 0x40060f84
#define CYREG_SCB0_INTR_TX_MASK 0x40060f88
#define CYREG_SCB0_INTR_TX_MASKED 0x40060f8c
#define CYREG_SCB0_INTR_RX 0x40060fc0
#define CYREG_SCB0_INTR_RX_SET 0x40060fc4
#define CYREG_SCB0_INTR_RX_MASK 0x40060fc8
#define CYREG_SCB0_INTR_RX_MASKED 0x40060fcc
#define CYDEV_SCB1_BASE 0x40070000
#define CYDEV_SCB1_SIZE 0x00010000
#define CYREG_SCB1_CTRL 0x40070000
#define CYREG_SCB1_STATUS 0x40070004
#define CYREG_SCB1_SPI_CTRL 0x40070020
#define CYREG_SCB1_SPI_STATUS 0x40070024
#define CYREG_SCB1_UART_CTRL 0x40070040
#define CYREG_SCB1_UART_TX_CTRL 0x40070044
#define CYREG_SCB1_UART_RX_CTRL 0x40070048
#define CYREG_SCB1_UART_RX_STATUS 0x4007004c
#define CYREG_SCB1_I2C_CTRL 0x40070060
#define CYREG_SCB1_I2C_STATUS 0x40070064
#define CYREG_SCB1_I2C_M_CMD 0x40070068
#define CYREG_SCB1_I2C_S_CMD 0x4007006c
#define CYREG_SCB1_I2C_CFG 0x40070070
#define CYREG_SCB1_BIST_CONTROL 0x40070100
#define CYREG_SCB1_BIST_DATA 0x40070104
#define CYREG_SCB1_TX_CTRL 0x40070200
#define CYREG_SCB1_TX_FIFO_CTRL 0x40070204
#define CYREG_SCB1_TX_FIFO_STATUS 0x40070208
#define CYREG_SCB1_TX_FIFO_WR 0x40070240
#define CYREG_SCB1_RX_CTRL 0x40070300
#define CYREG_SCB1_RX_FIFO_CTRL 0x40070304
#define CYREG_SCB1_RX_FIFO_STATUS 0x40070308
#define CYREG_SCB1_RX_MATCH 0x40070310
#define CYREG_SCB1_RX_FIFO_RD 0x40070340
#define CYREG_SCB1_RX_FIFO_RD_SILENT 0x40070344
#define CYREG_SCB1_EZ_DATA00 0x40070400
#define CYREG_SCB1_EZ_DATA01 0x40070404
#define CYREG_SCB1_EZ_DATA02 0x40070408
#define CYREG_SCB1_EZ_DATA03 0x4007040c
#define CYREG_SCB1_EZ_DATA04 0x40070410
#define CYREG_SCB1_EZ_DATA05 0x40070414
#define CYREG_SCB1_EZ_DATA06 0x40070418
#define CYREG_SCB1_EZ_DATA07 0x4007041c
#define CYREG_SCB1_EZ_DATA08 0x40070420
#define CYREG_SCB1_EZ_DATA09 0x40070424
#define CYREG_SCB1_EZ_DATA10 0x40070428
#define CYREG_SCB1_EZ_DATA11 0x4007042c
#define CYREG_SCB1_EZ_DATA12 0x40070430
#define CYREG_SCB1_EZ_DATA13 0x40070434
#define CYREG_SCB1_EZ_DATA14 0x40070438
#define CYREG_SCB1_EZ_DATA15 0x4007043c
#define CYREG_SCB1_EZ_DATA16 0x40070440
#define CYREG_SCB1_EZ_DATA17 0x40070444
#define CYREG_SCB1_EZ_DATA18 0x40070448
#define CYREG_SCB1_EZ_DATA19 0x4007044c
#define CYREG_SCB1_EZ_DATA20 0x40070450
#define CYREG_SCB1_EZ_DATA21 0x40070454
#define CYREG_SCB1_EZ_DATA22 0x40070458
#define CYREG_SCB1_EZ_DATA23 0x4007045c
#define CYREG_SCB1_EZ_DATA24 0x40070460
#define CYREG_SCB1_EZ_DATA25 0x40070464
#define CYREG_SCB1_EZ_DATA26 0x40070468
#define CYREG_SCB1_EZ_DATA27 0x4007046c
#define CYREG_SCB1_EZ_DATA28 0x40070470
#define CYREG_SCB1_EZ_DATA29 0x40070474
#define CYREG_SCB1_EZ_DATA30 0x40070478
#define CYREG_SCB1_EZ_DATA31 0x4007047c
#define CYREG_SCB1_INTR_CAUSE 0x40070e00
#define CYREG_SCB1_INTR_I2C_EC 0x40070e80
#define CYREG_SCB1_INTR_I2C_EC_MASK 0x40070e88
#define CYREG_SCB1_INTR_I2C_EC_MASKED 0x40070e8c
#define CYREG_SCB1_INTR_SPI_EC 0x40070ec0
#define CYREG_SCB1_INTR_SPI_EC_MASK 0x40070ec8
#define CYREG_SCB1_INTR_SPI_EC_MASKED 0x40070ecc
#define CYREG_SCB1_INTR_M 0x40070f00
#define CYREG_SCB1_INTR_M_SET 0x40070f04
#define CYREG_SCB1_INTR_M_MASK 0x40070f08
#define CYREG_SCB1_INTR_M_MASKED 0x40070f0c
#define CYREG_SCB1_INTR_S 0x40070f40
#define CYREG_SCB1_INTR_S_SET 0x40070f44
#define CYREG_SCB1_INTR_S_MASK 0x40070f48
#define CYREG_SCB1_INTR_S_MASKED 0x40070f4c
#define CYREG_SCB1_INTR_TX 0x40070f80
#define CYREG_SCB1_INTR_TX_SET 0x40070f84
#define CYREG_SCB1_INTR_TX_MASK 0x40070f88
#define CYREG_SCB1_INTR_TX_MASKED 0x40070f8c
#define CYREG_SCB1_INTR_RX 0x40070fc0
#define CYREG_SCB1_INTR_RX_SET 0x40070fc4
#define CYREG_SCB1_INTR_RX_MASK 0x40070fc8
#define CYREG_SCB1_INTR_RX_MASKED 0x40070fcc
#define CYDEV_CSD_BASE 0x40080000
#define CYDEV_CSD_SIZE 0x00010000
#define CYREG_CSD_ID 0x40080000
#define CYREG_CSD_CONFIG 0x40080004
#define CYREG_CSD_IDAC 0x40080008
#define CYREG_CSD_COUNTER 0x4008000c
#define CYREG_CSD_STATUS 0x40080010
#define CYREG_CSD_INTR 0x40080014
#define CYREG_CSD_INTR_SET 0x40080018
#define CYREG_CSD_TRIM1 0x4008ff00
#define CYREG_CSD_TRIM2 0x4008ff04
#define CYDEV_LCD_BASE 0x40090000
#define CYDEV_LCD_SIZE 0x00010000
#define CYREG_LCD_ID 0x40090000
#define CYREG_LCD_DIVIDER 0x40090004
#define CYREG_LCD_CONTROL 0x40090008
#define CYREG_LCD_DATA00 0x40090100
#define CYREG_LCD_DATA01 0x40090104
#define CYREG_LCD_DATA02 0x40090108
#define CYREG_LCD_DATA03 0x4009010c
#define CYREG_LCD_DATA04 0x40090110
#define CYDEV_LPCOMP_BASE 0x400a0000
#define CYDEV_LPCOMP_SIZE 0x00010000
#define CYREG_LPCOMP_ID 0x400a0000
#define CYREG_LPCOMP_CONFIG 0x400a0004
#define CYREG_LPCOMP_DFT 0x400a0008
#define CYREG_LPCOMP_INTR 0x400a000c
#define CYREG_LPCOMP_INTR_SET 0x400a0010
#define CYREG_LPCOMP_TRIM1 0x400aff00
#define CYREG_LPCOMP_TRIM2 0x400aff04
#define CYREG_LPCOMP_TRIM3 0x400aff08
#define CYREG_LPCOMP_TRIM4 0x400aff0c
#define CYDEV__BASE 0x400b0000
#define CYDEV__SIZE 0x00010000
#define CYREG_PWR_CONTROL 0x400b0000
#define CYREG_PWR_INTR 0x400b0004
#define CYREG_PWR_INTR_MASK 0x400b0008
#define CYREG_PWR_KEY_DELAY 0x400b000c
#define CYREG_PWR_PWRSYS_CONFIG 0x400b0010
#define CYREG_PWR_BG_CONFIG 0x400b0014
#define CYREG_PWR_VMON_CONFIG 0x400b0018
#define CYREG_PWR_DFT_SELECT 0x400b001c
#define CYREG_PWR_DDFT_SELECT 0x400b0020
#define CYREG_PWR_DFT_KEY 0x400b0024
#define CYREG_PWR_BOD_KEY 0x400b0028
#define CYREG_PWR_STOP 0x400b002c
#define CYREG_CLK_SELECT 0x400b0100
#define CYREG_CLK_ILO_CONFIG 0x400b0104
#define CYREG_CLK_IMO_CONFIG 0x400b0108
#define CYREG_CLK_IMO_SPREAD 0x400b010c
#define CYREG_CLK_DFT_SELECT 0x400b0110
#define CYREG_WDT_CTRLOW 0x400b0200
#define CYREG_WDT_CTRHIGH 0x400b0204
#define CYREG_WDT_MATCH 0x400b0208
#define CYREG_WDT_CONFIG 0x400b020c
#define CYREG_WDT_CONTROL 0x400b0210
#define CYREG_RES_CAUSE 0x400b0300
#define CYREG_PWR_PWRSYS_TRIM1 0x400bff00
#define CYREG_PWR_PWRSYS_TRIM2 0x400bff04
#define CYREG_PWR_PWRSYS_TRIM3 0x400bff08
#define CYREG_PWR_PWRSYS_TRIM4 0x400bff0c
#define CYREG_PWR_BG_TRIM1 0x400bff10
#define CYREG_PWR_BG_TRIM2 0x400bff14
#define CYREG_PWR_BG_TRIM3 0x400bff18
#define CYREG_PWR_BG_TRIM4 0x400bff1c
#define CYREG_PWR_BG_TRIM5 0x400bff20
#define CYREG_CLK_ILO_TRIM 0x400bff24
#define CYREG_CLK_IMO_TRIM1 0x400bff28
#define CYREG_CLK_IMO_TRIM2 0x400bff2c
#define CYREG_CLK_IMO_TRIM3 0x400bff30
#define CYREG_CLK_IMO_TRIM4 0x400bff34
#define CYREG_PWR_RSVD_TRIM 0x400bff38
#define CYDEV_SPCIF_BASE 0x400e0000
#define CYDEV_SPCIF_SIZE 0x00010000
#define CYREG_SPCIF_GEOMETRY 0x400e0000
#define CYREG_SPCIF_NVL_WR_DATA 0x400e001c
#define CYDEV_UDB_BASE 0x400f0000
#define CYDEV_UDB_SIZE 0x00010000
#define CYDEV_UDB_W8_BASE 0x400f0000
#define CYDEV_UDB_W8_SIZE 0x00001000
#define CYREG_UDB_W8_A0_00 0x400f0000
#define CYREG_UDB_W8_A0_01 0x400f0001
#define CYREG_UDB_W8_A0_02 0x400f0002
#define CYREG_UDB_W8_A0_03 0x400f0003
#define CYREG_UDB_W8_A1_00 0x400f0010
#define CYREG_UDB_W8_A1_01 0x400f0011
#define CYREG_UDB_W8_A1_02 0x400f0012
#define CYREG_UDB_W8_A1_03 0x400f0013
#define CYREG_UDB_W8_D0_00 0x400f0020
#define CYREG_UDB_W8_D0_01 0x400f0021
#define CYREG_UDB_W8_D0_02 0x400f0022
#define CYREG_UDB_W8_D0_03 0x400f0023
#define CYREG_UDB_W8_D1_00 0x400f0030
#define CYREG_UDB_W8_D1_01 0x400f0031
#define CYREG_UDB_W8_D1_02 0x400f0032
#define CYREG_UDB_W8_D1_03 0x400f0033
#define CYREG_UDB_W8_F0_00 0x400f0040
#define CYREG_UDB_W8_F0_01 0x400f0041
#define CYREG_UDB_W8_F0_02 0x400f0042
#define CYREG_UDB_W8_F0_03 0x400f0043
#define CYREG_UDB_W8_F1_00 0x400f0050
#define CYREG_UDB_W8_F1_01 0x400f0051
#define CYREG_UDB_W8_F1_02 0x400f0052
#define CYREG_UDB_W8_F1_03 0x400f0053
#define CYREG_UDB_W8_ST_00 0x400f0060
#define CYREG_UDB_W8_ST_01 0x400f0061
#define CYREG_UDB_W8_ST_02 0x400f0062
#define CYREG_UDB_W8_ST_03 0x400f0063
#define CYREG_UDB_W8_CTL_00 0x400f0070
#define CYREG_UDB_W8_CTL_01 0x400f0071
#define CYREG_UDB_W8_CTL_02 0x400f0072
#define CYREG_UDB_W8_CTL_03 0x400f0073
#define CYREG_UDB_W8_MSK_00 0x400f0080
#define CYREG_UDB_W8_MSK_01 0x400f0081
#define CYREG_UDB_W8_MSK_02 0x400f0082
#define CYREG_UDB_W8_MSK_03 0x400f0083
#define CYREG_UDB_W8_ACTL_00 0x400f0090
#define CYREG_UDB_W8_ACTL_01 0x400f0091
#define CYREG_UDB_W8_ACTL_02 0x400f0092
#define CYREG_UDB_W8_ACTL_03 0x400f0093
#define CYREG_UDB_W8_MC_00 0x400f00a0
#define CYREG_UDB_W8_MC_01 0x400f00a1
#define CYREG_UDB_W8_MC_02 0x400f00a2
#define CYREG_UDB_W8_MC_03 0x400f00a3
#define CYDEV_UDB_CAT16_BASE 0x400f1000
#define CYDEV_UDB_CAT16_SIZE 0x00001000
#define CYREG_UDB_CAT16_A_00 0x400f1000
#define CYREG_UDB_CAT16_A_01 0x400f1002
#define CYREG_UDB_CAT16_A_02 0x400f1004
#define CYREG_UDB_CAT16_A_03 0x400f1006
#define CYREG_UDB_CAT16_D_00 0x400f1040
#define CYREG_UDB_CAT16_D_01 0x400f1042
#define CYREG_UDB_CAT16_D_02 0x400f1044
#define CYREG_UDB_CAT16_D_03 0x400f1046
#define CYREG_UDB_CAT16_F_00 0x400f1080
#define CYREG_UDB_CAT16_F_01 0x400f1082
#define CYREG_UDB_CAT16_F_02 0x400f1084
#define CYREG_UDB_CAT16_F_03 0x400f1086
#define CYREG_UDB_CAT16_CTL_ST_00 0x400f10c0
#define CYREG_UDB_CAT16_CTL_ST_01 0x400f10c2
#define CYREG_UDB_CAT16_CTL_ST_02 0x400f10c4
#define CYREG_UDB_CAT16_CTL_ST_03 0x400f10c6
#define CYREG_UDB_CAT16_ACTL_MSK_00 0x400f1100
#define CYREG_UDB_CAT16_ACTL_MSK_01 0x400f1102
#define CYREG_UDB_CAT16_ACTL_MSK_02 0x400f1104
#define CYREG_UDB_CAT16_ACTL_MSK_03 0x400f1106
#define CYREG_UDB_CAT16_MC_00 0x400f1140
#define CYREG_UDB_CAT16_MC_01 0x400f1142
#define CYREG_UDB_CAT16_MC_02 0x400f1144
#define CYREG_UDB_CAT16_MC_03 0x400f1146
#define CYDEV_UDB_W16_BASE 0x400f1000
#define CYDEV_UDB_W16_SIZE 0x00001000
#define CYREG_UDB_W16_A0_00 0x400f1000
#define CYREG_UDB_W16_A0_01 0x400f1002
#define CYREG_UDB_W16_A0_02 0x400f1004
#define CYREG_UDB_W16_A1_00 0x400f1020
#define CYREG_UDB_W16_A1_01 0x400f1022
#define CYREG_UDB_W16_A1_02 0x400f1024
#define CYREG_UDB_W16_D0_00 0x400f1040
#define CYREG_UDB_W16_D0_01 0x400f1042
#define CYREG_UDB_W16_D0_02 0x400f1044
#define CYREG_UDB_W16_D1_00 0x400f1060
#define CYREG_UDB_W16_D1_01 0x400f1062
#define CYREG_UDB_W16_D1_02 0x400f1064
#define CYREG_UDB_W16_F0_00 0x400f1080
#define CYREG_UDB_W16_F0_01 0x400f1082
#define CYREG_UDB_W16_F0_02 0x400f1084
#define CYREG_UDB_W16_F1_00 0x400f10a0
#define CYREG_UDB_W16_F1_01 0x400f10a2
#define CYREG_UDB_W16_F1_02 0x400f10a4
#define CYREG_UDB_W16_ST_00 0x400f10c0
#define CYREG_UDB_W16_ST_01 0x400f10c2
#define CYREG_UDB_W16_ST_02 0x400f10c4
#define CYREG_UDB_W16_CTL_00 0x400f10e0
#define CYREG_UDB_W16_CTL_01 0x400f10e2
#define CYREG_UDB_W16_CTL_02 0x400f10e4
#define CYREG_UDB_W16_MSK_00 0x400f1100
#define CYREG_UDB_W16_MSK_01 0x400f1102
#define CYREG_UDB_W16_MSK_02 0x400f1104
#define CYREG_UDB_W16_ACTL_00 0x400f1120
#define CYREG_UDB_W16_ACTL_01 0x400f1122
#define CYREG_UDB_W16_ACTL_02 0x400f1124
#define CYREG_UDB_W16_MC_00 0x400f1140
#define CYREG_UDB_W16_MC_01 0x400f1142
#define CYREG_UDB_W16_MC_02 0x400f1144
#define CYDEV_UDB_W32_BASE 0x400f2000
#define CYDEV_UDB_W32_SIZE 0x00001000
#define CYREG_UDB_W32_A0_00 0x400f2000
#define CYREG_UDB_W32_A1_00 0x400f2040
#define CYREG_UDB_W32_D0_00 0x400f2080
#define CYREG_UDB_W32_D1_00 0x400f20c0
#define CYREG_UDB_W32_F0_00 0x400f2100
#define CYREG_UDB_W32_F1_00 0x400f2140
#define CYREG_UDB_W32_ST_00 0x400f2180
#define CYREG_UDB_W32_CTL_00 0x400f21c0
#define CYREG_UDB_W32_MSK_00 0x400f2200
#define CYREG_UDB_W32_ACTL_00 0x400f2240
#define CYREG_UDB_W32_MC_00 0x400f2280
#define CYDEV_UDB_P0_BASE 0x400f3000
#define CYDEV_UDB_P0_SIZE 0x00000200
#define CYDEV_UDB_P0_U0_BASE 0x400f3000
#define CYDEV_UDB_P0_U0_SIZE 0x00000080
#define CYREG_UDB_P0_U0_PLD_IT0 0x400f3000
#define CYREG_UDB_P0_U0_PLD_IT1 0x400f3004
#define CYREG_UDB_P0_U0_PLD_IT2 0x400f3008
#define CYREG_UDB_P0_U0_PLD_IT3 0x400f300c
#define CYREG_UDB_P0_U0_PLD_IT4 0x400f3010
#define CYREG_UDB_P0_U0_PLD_IT5 0x400f3014
#define CYREG_UDB_P0_U0_PLD_IT6 0x400f3018
#define CYREG_UDB_P0_U0_PLD_IT7 0x400f301c
#define CYREG_UDB_P0_U0_PLD_IT8 0x400f3020
#define CYREG_UDB_P0_U0_PLD_IT9 0x400f3024
#define CYREG_UDB_P0_U0_PLD_IT10 0x400f3028
#define CYREG_UDB_P0_U0_PLD_IT11 0x400f302c
#define CYREG_UDB_P0_U0_PLD_ORT0 0x400f3030
#define CYREG_UDB_P0_U0_PLD_ORT1 0x400f3032
#define CYREG_UDB_P0_U0_PLD_ORT2 0x400f3034
#define CYREG_UDB_P0_U0_PLD_ORT3 0x400f3036
#define CYREG_UDB_P0_U0_PLD_MC_CFG_CEN_CONST 0x400f3038
#define CYREG_UDB_P0_U0_PLD_MC_CFG_XORFB 0x400f303a
#define CYREG_UDB_P0_U0_PLD_MC_SET_RESET 0x400f303c
#define CYREG_UDB_P0_U0_PLD_MC_CFG_BYPASS 0x400f303e
#define CYREG_UDB_P0_U0_CFG0 0x400f3040
#define CYREG_UDB_P0_U0_CFG1 0x400f3041
#define CYREG_UDB_P0_U0_CFG2 0x400f3042
#define CYREG_UDB_P0_U0_CFG3 0x400f3043
#define CYREG_UDB_P0_U0_CFG4 0x400f3044
#define CYREG_UDB_P0_U0_CFG5 0x400f3045
#define CYREG_UDB_P0_U0_CFG6 0x400f3046
#define CYREG_UDB_P0_U0_CFG7 0x400f3047
#define CYREG_UDB_P0_U0_CFG8 0x400f3048
#define CYREG_UDB_P0_U0_CFG9 0x400f3049
#define CYREG_UDB_P0_U0_CFG10 0x400f304a
#define CYREG_UDB_P0_U0_CFG11 0x400f304b
#define CYREG_UDB_P0_U0_CFG12 0x400f304c
#define CYREG_UDB_P0_U0_CFG13 0x400f304d
#define CYREG_UDB_P0_U0_CFG14 0x400f304e
#define CYREG_UDB_P0_U0_CFG15 0x400f304f
#define CYREG_UDB_P0_U0_CFG16 0x400f3050
#define CYREG_UDB_P0_U0_CFG17 0x400f3051
#define CYREG_UDB_P0_U0_CFG18 0x400f3052
#define CYREG_UDB_P0_U0_CFG19 0x400f3053
#define CYREG_UDB_P0_U0_CFG20 0x400f3054
#define CYREG_UDB_P0_U0_CFG21 0x400f3055
#define CYREG_UDB_P0_U0_CFG22 0x400f3056
#define CYREG_UDB_P0_U0_CFG23 0x400f3057
#define CYREG_UDB_P0_U0_CFG24 0x400f3058
#define CYREG_UDB_P0_U0_CFG25 0x400f3059
#define CYREG_UDB_P0_U0_CFG26 0x400f305a
#define CYREG_UDB_P0_U0_CFG27 0x400f305b
#define CYREG_UDB_P0_U0_CFG28 0x400f305c
#define CYREG_UDB_P0_U0_CFG29 0x400f305d
#define CYREG_UDB_P0_U0_CFG30 0x400f305e
#define CYREG_UDB_P0_U0_CFG31 0x400f305f
#define CYREG_UDB_P0_U0_DCFG0 0x400f3060
#define CYREG_UDB_P0_U0_DCFG1 0x400f3062
#define CYREG_UDB_P0_U0_DCFG2 0x400f3064
#define CYREG_UDB_P0_U0_DCFG3 0x400f3066
#define CYREG_UDB_P0_U0_DCFG4 0x400f3068
#define CYREG_UDB_P0_U0_DCFG5 0x400f306a
#define CYREG_UDB_P0_U0_DCFG6 0x400f306c
#define CYREG_UDB_P0_U0_DCFG7 0x400f306e
#define CYDEV_UDB_P0_U1_BASE 0x400f3080
#define CYDEV_UDB_P0_U1_SIZE 0x00000080
#define CYREG_UDB_P0_U1_PLD_IT0 0x400f3080
#define CYREG_UDB_P0_U1_PLD_IT1 0x400f3084
#define CYREG_UDB_P0_U1_PLD_IT2 0x400f3088
#define CYREG_UDB_P0_U1_PLD_IT3 0x400f308c
#define CYREG_UDB_P0_U1_PLD_IT4 0x400f3090
#define CYREG_UDB_P0_U1_PLD_IT5 0x400f3094
#define CYREG_UDB_P0_U1_PLD_IT6 0x400f3098
#define CYREG_UDB_P0_U1_PLD_IT7 0x400f309c
#define CYREG_UDB_P0_U1_PLD_IT8 0x400f30a0
#define CYREG_UDB_P0_U1_PLD_IT9 0x400f30a4
#define CYREG_UDB_P0_U1_PLD_IT10 0x400f30a8
#define CYREG_UDB_P0_U1_PLD_IT11 0x400f30ac
#define CYREG_UDB_P0_U1_PLD_ORT0 0x400f30b0
#define CYREG_UDB_P0_U1_PLD_ORT1 0x400f30b2
#define CYREG_UDB_P0_U1_PLD_ORT2 0x400f30b4
#define CYREG_UDB_P0_U1_PLD_ORT3 0x400f30b6
#define CYREG_UDB_P0_U1_PLD_MC_CFG_CEN_CONST 0x400f30b8
#define CYREG_UDB_P0_U1_PLD_MC_CFG_XORFB 0x400f30ba
#define CYREG_UDB_P0_U1_PLD_MC_SET_RESET 0x400f30bc
#define CYREG_UDB_P0_U1_PLD_MC_CFG_BYPASS 0x400f30be
#define CYREG_UDB_P0_U1_CFG0 0x400f30c0
#define CYREG_UDB_P0_U1_CFG1 0x400f30c1
#define CYREG_UDB_P0_U1_CFG2 0x400f30c2
#define CYREG_UDB_P0_U1_CFG3 0x400f30c3
#define CYREG_UDB_P0_U1_CFG4 0x400f30c4
#define CYREG_UDB_P0_U1_CFG5 0x400f30c5
#define CYREG_UDB_P0_U1_CFG6 0x400f30c6
#define CYREG_UDB_P0_U1_CFG7 0x400f30c7
#define CYREG_UDB_P0_U1_CFG8 0x400f30c8
#define CYREG_UDB_P0_U1_CFG9 0x400f30c9
#define CYREG_UDB_P0_U1_CFG10 0x400f30ca
#define CYREG_UDB_P0_U1_CFG11 0x400f30cb
#define CYREG_UDB_P0_U1_CFG12 0x400f30cc
#define CYREG_UDB_P0_U1_CFG13 0x400f30cd
#define CYREG_UDB_P0_U1_CFG14 0x400f30ce
#define CYREG_UDB_P0_U1_CFG15 0x400f30cf
#define CYREG_UDB_P0_U1_CFG16 0x400f30d0
#define CYREG_UDB_P0_U1_CFG17 0x400f30d1
#define CYREG_UDB_P0_U1_CFG18 0x400f30d2
#define CYREG_UDB_P0_U1_CFG19 0x400f30d3
#define CYREG_UDB_P0_U1_CFG20 0x400f30d4
#define CYREG_UDB_P0_U1_CFG21 0x400f30d5
#define CYREG_UDB_P0_U1_CFG22 0x400f30d6
#define CYREG_UDB_P0_U1_CFG23 0x400f30d7
#define CYREG_UDB_P0_U1_CFG24 0x400f30d8
#define CYREG_UDB_P0_U1_CFG25 0x400f30d9
#define CYREG_UDB_P0_U1_CFG26 0x400f30da
#define CYREG_UDB_P0_U1_CFG27 0x400f30db
#define CYREG_UDB_P0_U1_CFG28 0x400f30dc
#define CYREG_UDB_P0_U1_CFG29 0x400f30dd
#define CYREG_UDB_P0_U1_CFG30 0x400f30de
#define CYREG_UDB_P0_U1_CFG31 0x400f30df
#define CYREG_UDB_P0_U1_DCFG0 0x400f30e0
#define CYREG_UDB_P0_U1_DCFG1 0x400f30e2
#define CYREG_UDB_P0_U1_DCFG2 0x400f30e4
#define CYREG_UDB_P0_U1_DCFG3 0x400f30e6
#define CYREG_UDB_P0_U1_DCFG4 0x400f30e8
#define CYREG_UDB_P0_U1_DCFG5 0x400f30ea
#define CYREG_UDB_P0_U1_DCFG6 0x400f30ec
#define CYREG_UDB_P0_U1_DCFG7 0x400f30ee
#define CYDEV_UDB_P0_ROUTE_BASE 0x400f3100
#define CYDEV_UDB_P0_ROUTE_SIZE 0x00000100
#define CYREG_UDB_P0_ROUTE_HC0 0x400f3100
#define CYREG_UDB_P0_ROUTE_HC1 0x400f3101
#define CYREG_UDB_P0_ROUTE_HC2 0x400f3102
#define CYREG_UDB_P0_ROUTE_HC3 0x400f3103
#define CYREG_UDB_P0_ROUTE_HC4 0x400f3104
#define CYREG_UDB_P0_ROUTE_HC5 0x400f3105
#define CYREG_UDB_P0_ROUTE_HC6 0x400f3106
#define CYREG_UDB_P0_ROUTE_HC7 0x400f3107
#define CYREG_UDB_P0_ROUTE_HC8 0x400f3108
#define CYREG_UDB_P0_ROUTE_HC9 0x400f3109
#define CYREG_UDB_P0_ROUTE_HC10 0x400f310a
#define CYREG_UDB_P0_ROUTE_HC11 0x400f310b
#define CYREG_UDB_P0_ROUTE_HC12 0x400f310c
#define CYREG_UDB_P0_ROUTE_HC13 0x400f310d
#define CYREG_UDB_P0_ROUTE_HC14 0x400f310e
#define CYREG_UDB_P0_ROUTE_HC15 0x400f310f
#define CYREG_UDB_P0_ROUTE_HC16 0x400f3110
#define CYREG_UDB_P0_ROUTE_HC17 0x400f3111
#define CYREG_UDB_P0_ROUTE_HC18 0x400f3112
#define CYREG_UDB_P0_ROUTE_HC19 0x400f3113
#define CYREG_UDB_P0_ROUTE_HC20 0x400f3114
#define CYREG_UDB_P0_ROUTE_HC21 0x400f3115
#define CYREG_UDB_P0_ROUTE_HC22 0x400f3116
#define CYREG_UDB_P0_ROUTE_HC23 0x400f3117
#define CYREG_UDB_P0_ROUTE_HC24 0x400f3118
#define CYREG_UDB_P0_ROUTE_HC25 0x400f3119
#define CYREG_UDB_P0_ROUTE_HC26 0x400f311a
#define CYREG_UDB_P0_ROUTE_HC27 0x400f311b
#define CYREG_UDB_P0_ROUTE_HC28 0x400f311c
#define CYREG_UDB_P0_ROUTE_HC29 0x400f311d
#define CYREG_UDB_P0_ROUTE_HC30 0x400f311e
#define CYREG_UDB_P0_ROUTE_HC31 0x400f311f
#define CYREG_UDB_P0_ROUTE_HC32 0x400f3120
#define CYREG_UDB_P0_ROUTE_HC33 0x400f3121
#define CYREG_UDB_P0_ROUTE_HC34 0x400f3122
#define CYREG_UDB_P0_ROUTE_HC35 0x400f3123
#define CYREG_UDB_P0_ROUTE_HC36 0x400f3124
#define CYREG_UDB_P0_ROUTE_HC37 0x400f3125
#define CYREG_UDB_P0_ROUTE_HC38 0x400f3126
#define CYREG_UDB_P0_ROUTE_HC39 0x400f3127
#define CYREG_UDB_P0_ROUTE_HC40 0x400f3128
#define CYREG_UDB_P0_ROUTE_HC41 0x400f3129
#define CYREG_UDB_P0_ROUTE_HC42 0x400f312a
#define CYREG_UDB_P0_ROUTE_HC43 0x400f312b
#define CYREG_UDB_P0_ROUTE_HC44 0x400f312c
#define CYREG_UDB_P0_ROUTE_HC45 0x400f312d
#define CYREG_UDB_P0_ROUTE_HC46 0x400f312e
#define CYREG_UDB_P0_ROUTE_HC47 0x400f312f
#define CYREG_UDB_P0_ROUTE_HC48 0x400f3130
#define CYREG_UDB_P0_ROUTE_HC49 0x400f3131
#define CYREG_UDB_P0_ROUTE_HC50 0x400f3132
#define CYREG_UDB_P0_ROUTE_HC51 0x400f3133
#define CYREG_UDB_P0_ROUTE_HC52 0x400f3134
#define CYREG_UDB_P0_ROUTE_HC53 0x400f3135
#define CYREG_UDB_P0_ROUTE_HC54 0x400f3136
#define CYREG_UDB_P0_ROUTE_HC55 0x400f3137
#define CYREG_UDB_P0_ROUTE_HC56 0x400f3138
#define CYREG_UDB_P0_ROUTE_HC57 0x400f3139
#define CYREG_UDB_P0_ROUTE_HC58 0x400f313a
#define CYREG_UDB_P0_ROUTE_HC59 0x400f313b
#define CYREG_UDB_P0_ROUTE_HC60 0x400f313c
#define CYREG_UDB_P0_ROUTE_HC61 0x400f313d
#define CYREG_UDB_P0_ROUTE_HC62 0x400f313e
#define CYREG_UDB_P0_ROUTE_HC63 0x400f313f
#define CYREG_UDB_P0_ROUTE_HC64 0x400f3140
#define CYREG_UDB_P0_ROUTE_HC65 0x400f3141
#define CYREG_UDB_P0_ROUTE_HC66 0x400f3142
#define CYREG_UDB_P0_ROUTE_HC67 0x400f3143
#define CYREG_UDB_P0_ROUTE_HC68 0x400f3144
#define CYREG_UDB_P0_ROUTE_HC69 0x400f3145
#define CYREG_UDB_P0_ROUTE_HC70 0x400f3146
#define CYREG_UDB_P0_ROUTE_HC71 0x400f3147
#define CYREG_UDB_P0_ROUTE_HC72 0x400f3148
#define CYREG_UDB_P0_ROUTE_HC73 0x400f3149
#define CYREG_UDB_P0_ROUTE_HC74 0x400f314a
#define CYREG_UDB_P0_ROUTE_HC75 0x400f314b
#define CYREG_UDB_P0_ROUTE_HC76 0x400f314c
#define CYREG_UDB_P0_ROUTE_HC77 0x400f314d
#define CYREG_UDB_P0_ROUTE_HC78 0x400f314e
#define CYREG_UDB_P0_ROUTE_HC79 0x400f314f
#define CYREG_UDB_P0_ROUTE_HC80 0x400f3150
#define CYREG_UDB_P0_ROUTE_HC81 0x400f3151
#define CYREG_UDB_P0_ROUTE_HC82 0x400f3152
#define CYREG_UDB_P0_ROUTE_HC83 0x400f3153
#define CYREG_UDB_P0_ROUTE_HC84 0x400f3154
#define CYREG_UDB_P0_ROUTE_HC85 0x400f3155
#define CYREG_UDB_P0_ROUTE_HC86 0x400f3156
#define CYREG_UDB_P0_ROUTE_HC87 0x400f3157
#define CYREG_UDB_P0_ROUTE_HC88 0x400f3158
#define CYREG_UDB_P0_ROUTE_HC89 0x400f3159
#define CYREG_UDB_P0_ROUTE_HC90 0x400f315a
#define CYREG_UDB_P0_ROUTE_HC91 0x400f315b
#define CYREG_UDB_P0_ROUTE_HC92 0x400f315c
#define CYREG_UDB_P0_ROUTE_HC93 0x400f315d
#define CYREG_UDB_P0_ROUTE_HC94 0x400f315e
#define CYREG_UDB_P0_ROUTE_HC95 0x400f315f
#define CYREG_UDB_P0_ROUTE_HC96 0x400f3160
#define CYREG_UDB_P0_ROUTE_HC97 0x400f3161
#define CYREG_UDB_P0_ROUTE_HC98 0x400f3162
#define CYREG_UDB_P0_ROUTE_HC99 0x400f3163
#define CYREG_UDB_P0_ROUTE_HC100 0x400f3164
#define CYREG_UDB_P0_ROUTE_HC101 0x400f3165
#define CYREG_UDB_P0_ROUTE_HC102 0x400f3166
#define CYREG_UDB_P0_ROUTE_HC103 0x400f3167
#define CYREG_UDB_P0_ROUTE_HC104 0x400f3168
#define CYREG_UDB_P0_ROUTE_HC105 0x400f3169
#define CYREG_UDB_P0_ROUTE_HC106 0x400f316a
#define CYREG_UDB_P0_ROUTE_HC107 0x400f316b
#define CYREG_UDB_P0_ROUTE_HC108 0x400f316c
#define CYREG_UDB_P0_ROUTE_HC109 0x400f316d
#define CYREG_UDB_P0_ROUTE_HC110 0x400f316e
#define CYREG_UDB_P0_ROUTE_HC111 0x400f316f
#define CYREG_UDB_P0_ROUTE_HC112 0x400f3170
#define CYREG_UDB_P0_ROUTE_HC113 0x400f3171
#define CYREG_UDB_P0_ROUTE_HC114 0x400f3172
#define CYREG_UDB_P0_ROUTE_HC115 0x400f3173
#define CYREG_UDB_P0_ROUTE_HC116 0x400f3174
#define CYREG_UDB_P0_ROUTE_HC117 0x400f3175
#define CYREG_UDB_P0_ROUTE_HC118 0x400f3176
#define CYREG_UDB_P0_ROUTE_HC119 0x400f3177
#define CYREG_UDB_P0_ROUTE_HC120 0x400f3178
#define CYREG_UDB_P0_ROUTE_HC121 0x400f3179
#define CYREG_UDB_P0_ROUTE_HC122 0x400f317a
#define CYREG_UDB_P0_ROUTE_HC123 0x400f317b
#define CYREG_UDB_P0_ROUTE_HC124 0x400f317c
#define CYREG_UDB_P0_ROUTE_HC125 0x400f317d
#define CYREG_UDB_P0_ROUTE_HC126 0x400f317e
#define CYREG_UDB_P0_ROUTE_HC127 0x400f317f
#define CYREG_UDB_P0_ROUTE_HV_L0 0x400f3180
#define CYREG_UDB_P0_ROUTE_HV_L1 0x400f3181
#define CYREG_UDB_P0_ROUTE_HV_L2 0x400f3182
#define CYREG_UDB_P0_ROUTE_HV_L3 0x400f3183
#define CYREG_UDB_P0_ROUTE_HV_L4 0x400f3184
#define CYREG_UDB_P0_ROUTE_HV_L5 0x400f3185
#define CYREG_UDB_P0_ROUTE_HV_L6 0x400f3186
#define CYREG_UDB_P0_ROUTE_HV_L7 0x400f3187
#define CYREG_UDB_P0_ROUTE_HV_L8 0x400f3188
#define CYREG_UDB_P0_ROUTE_HV_L9 0x400f3189
#define CYREG_UDB_P0_ROUTE_HV_L10 0x400f318a
#define CYREG_UDB_P0_ROUTE_HV_L11 0x400f318b
#define CYREG_UDB_P0_ROUTE_HV_L12 0x400f318c
#define CYREG_UDB_P0_ROUTE_HV_L13 0x400f318d
#define CYREG_UDB_P0_ROUTE_HV_L14 0x400f318e
#define CYREG_UDB_P0_ROUTE_HV_L15 0x400f318f
#define CYREG_UDB_P0_ROUTE_HS0 0x400f3190
#define CYREG_UDB_P0_ROUTE_HS1 0x400f3191
#define CYREG_UDB_P0_ROUTE_HS2 0x400f3192
#define CYREG_UDB_P0_ROUTE_HS3 0x400f3193
#define CYREG_UDB_P0_ROUTE_HS4 0x400f3194
#define CYREG_UDB_P0_ROUTE_HS5 0x400f3195
#define CYREG_UDB_P0_ROUTE_HS6 0x400f3196
#define CYREG_UDB_P0_ROUTE_HS7 0x400f3197
#define CYREG_UDB_P0_ROUTE_HS8 0x400f3198
#define CYREG_UDB_P0_ROUTE_HS9 0x400f3199
#define CYREG_UDB_P0_ROUTE_HS10 0x400f319a
#define CYREG_UDB_P0_ROUTE_HS11 0x400f319b
#define CYREG_UDB_P0_ROUTE_HS12 0x400f319c
#define CYREG_UDB_P0_ROUTE_HS13 0x400f319d
#define CYREG_UDB_P0_ROUTE_HS14 0x400f319e
#define CYREG_UDB_P0_ROUTE_HS15 0x400f319f
#define CYREG_UDB_P0_ROUTE_HS16 0x400f31a0
#define CYREG_UDB_P0_ROUTE_HS17 0x400f31a1
#define CYREG_UDB_P0_ROUTE_HS18 0x400f31a2
#define CYREG_UDB_P0_ROUTE_HS19 0x400f31a3
#define CYREG_UDB_P0_ROUTE_HS20 0x400f31a4
#define CYREG_UDB_P0_ROUTE_HS21 0x400f31a5
#define CYREG_UDB_P0_ROUTE_HS22 0x400f31a6
#define CYREG_UDB_P0_ROUTE_HS23 0x400f31a7
#define CYREG_UDB_P0_ROUTE_HV_R0 0x400f31a8
#define CYREG_UDB_P0_ROUTE_HV_R1 0x400f31a9
#define CYREG_UDB_P0_ROUTE_HV_R2 0x400f31aa
#define CYREG_UDB_P0_ROUTE_HV_R3 0x400f31ab
#define CYREG_UDB_P0_ROUTE_HV_R4 0x400f31ac
#define CYREG_UDB_P0_ROUTE_HV_R5 0x400f31ad
#define CYREG_UDB_P0_ROUTE_HV_R6 0x400f31ae
#define CYREG_UDB_P0_ROUTE_HV_R7 0x400f31af
#define CYREG_UDB_P0_ROUTE_HV_R8 0x400f31b0
#define CYREG_UDB_P0_ROUTE_HV_R9 0x400f31b1
#define CYREG_UDB_P0_ROUTE_HV_R10 0x400f31b2
#define CYREG_UDB_P0_ROUTE_HV_R11 0x400f31b3
#define CYREG_UDB_P0_ROUTE_HV_R12 0x400f31b4
#define CYREG_UDB_P0_ROUTE_HV_R13 0x400f31b5
#define CYREG_UDB_P0_ROUTE_HV_R14 0x400f31b6
#define CYREG_UDB_P0_ROUTE_HV_R15 0x400f31b7
#define CYREG_UDB_P0_ROUTE_PLD0IN0 0x400f31c0
#define CYREG_UDB_P0_ROUTE_PLD0IN1 0x400f31c2
#define CYREG_UDB_P0_ROUTE_PLD0IN2 0x400f31c4
#define CYREG_UDB_P0_ROUTE_PLD1IN0 0x400f31ca
#define CYREG_UDB_P0_ROUTE_PLD1IN1 0x400f31cc
#define CYREG_UDB_P0_ROUTE_PLD1IN2 0x400f31ce
#define CYREG_UDB_P0_ROUTE_DPIN0 0x400f31d0
#define CYREG_UDB_P0_ROUTE_DPIN1 0x400f31d2
#define CYREG_UDB_P0_ROUTE_SCIN 0x400f31d6
#define CYREG_UDB_P0_ROUTE_SCIOIN 0x400f31d8
#define CYREG_UDB_P0_ROUTE_RCIN 0x400f31de
#define CYREG_UDB_P0_ROUTE_VS0 0x400f31e0
#define CYREG_UDB_P0_ROUTE_VS1 0x400f31e2
#define CYREG_UDB_P0_ROUTE_VS2 0x400f31e4
#define CYREG_UDB_P0_ROUTE_VS3 0x400f31e6
#define CYREG_UDB_P0_ROUTE_VS4 0x400f31e8
#define CYREG_UDB_P0_ROUTE_VS5 0x400f31ea
#define CYREG_UDB_P0_ROUTE_VS6 0x400f31ec
#define CYREG_UDB_P0_ROUTE_VS7 0x400f31ee
#define CYDEV_UDB_P1_BASE 0x400f3200
#define CYDEV_UDB_P1_SIZE 0x00000200
#define CYDEV_UDB_P1_U0_BASE 0x400f3200
#define CYDEV_UDB_P1_U0_SIZE 0x00000080
#define CYREG_UDB_P1_U0_PLD_IT0 0x400f3200
#define CYREG_UDB_P1_U0_PLD_IT1 0x400f3204
#define CYREG_UDB_P1_U0_PLD_IT2 0x400f3208
#define CYREG_UDB_P1_U0_PLD_IT3 0x400f320c
#define CYREG_UDB_P1_U0_PLD_IT4 0x400f3210
#define CYREG_UDB_P1_U0_PLD_IT5 0x400f3214
#define CYREG_UDB_P1_U0_PLD_IT6 0x400f3218
#define CYREG_UDB_P1_U0_PLD_IT7 0x400f321c
#define CYREG_UDB_P1_U0_PLD_IT8 0x400f3220
#define CYREG_UDB_P1_U0_PLD_IT9 0x400f3224
#define CYREG_UDB_P1_U0_PLD_IT10 0x400f3228
#define CYREG_UDB_P1_U0_PLD_IT11 0x400f322c
#define CYREG_UDB_P1_U0_PLD_ORT0 0x400f3230
#define CYREG_UDB_P1_U0_PLD_ORT1 0x400f3232
#define CYREG_UDB_P1_U0_PLD_ORT2 0x400f3234
#define CYREG_UDB_P1_U0_PLD_ORT3 0x400f3236
#define CYREG_UDB_P1_U0_PLD_MC_CFG_CEN_CONST 0x400f3238
#define CYREG_UDB_P1_U0_PLD_MC_CFG_XORFB 0x400f323a
#define CYREG_UDB_P1_U0_PLD_MC_SET_RESET 0x400f323c
#define CYREG_UDB_P1_U0_PLD_MC_CFG_BYPASS 0x400f323e
#define CYREG_UDB_P1_U0_CFG0 0x400f3240
#define CYREG_UDB_P1_U0_CFG1 0x400f3241
#define CYREG_UDB_P1_U0_CFG2 0x400f3242
#define CYREG_UDB_P1_U0_CFG3 0x400f3243
#define CYREG_UDB_P1_U0_CFG4 0x400f3244
#define CYREG_UDB_P1_U0_CFG5 0x400f3245
#define CYREG_UDB_P1_U0_CFG6 0x400f3246
#define CYREG_UDB_P1_U0_CFG7 0x400f3247
#define CYREG_UDB_P1_U0_CFG8 0x400f3248
#define CYREG_UDB_P1_U0_CFG9 0x400f3249
#define CYREG_UDB_P1_U0_CFG10 0x400f324a
#define CYREG_UDB_P1_U0_CFG11 0x400f324b
#define CYREG_UDB_P1_U0_CFG12 0x400f324c
#define CYREG_UDB_P1_U0_CFG13 0x400f324d
#define CYREG_UDB_P1_U0_CFG14 0x400f324e
#define CYREG_UDB_P1_U0_CFG15 0x400f324f
#define CYREG_UDB_P1_U0_CFG16 0x400f3250
#define CYREG_UDB_P1_U0_CFG17 0x400f3251
#define CYREG_UDB_P1_U0_CFG18 0x400f3252
#define CYREG_UDB_P1_U0_CFG19 0x400f3253
#define CYREG_UDB_P1_U0_CFG20 0x400f3254
#define CYREG_UDB_P1_U0_CFG21 0x400f3255
#define CYREG_UDB_P1_U0_CFG22 0x400f3256
#define CYREG_UDB_P1_U0_CFG23 0x400f3257
#define CYREG_UDB_P1_U0_CFG24 0x400f3258
#define CYREG_UDB_P1_U0_CFG25 0x400f3259
#define CYREG_UDB_P1_U0_CFG26 0x400f325a
#define CYREG_UDB_P1_U0_CFG27 0x400f325b
#define CYREG_UDB_P1_U0_CFG28 0x400f325c
#define CYREG_UDB_P1_U0_CFG29 0x400f325d
#define CYREG_UDB_P1_U0_CFG30 0x400f325e
#define CYREG_UDB_P1_U0_CFG31 0x400f325f
#define CYREG_UDB_P1_U0_DCFG0 0x400f3260
#define CYREG_UDB_P1_U0_DCFG1 0x400f3262
#define CYREG_UDB_P1_U0_DCFG2 0x400f3264
#define CYREG_UDB_P1_U0_DCFG3 0x400f3266
#define CYREG_UDB_P1_U0_DCFG4 0x400f3268
#define CYREG_UDB_P1_U0_DCFG5 0x400f326a
#define CYREG_UDB_P1_U0_DCFG6 0x400f326c
#define CYREG_UDB_P1_U0_DCFG7 0x400f326e
#define CYDEV_UDB_P1_U1_BASE 0x400f3280
#define CYDEV_UDB_P1_U1_SIZE 0x00000080
#define CYREG_UDB_P1_U1_PLD_IT0 0x400f3280
#define CYREG_UDB_P1_U1_PLD_IT1 0x400f3284
#define CYREG_UDB_P1_U1_PLD_IT2 0x400f3288
#define CYREG_UDB_P1_U1_PLD_IT3 0x400f328c
#define CYREG_UDB_P1_U1_PLD_IT4 0x400f3290
#define CYREG_UDB_P1_U1_PLD_IT5 0x400f3294
#define CYREG_UDB_P1_U1_PLD_IT6 0x400f3298
#define CYREG_UDB_P1_U1_PLD_IT7 0x400f329c
#define CYREG_UDB_P1_U1_PLD_IT8 0x400f32a0
#define CYREG_UDB_P1_U1_PLD_IT9 0x400f32a4
#define CYREG_UDB_P1_U1_PLD_IT10 0x400f32a8
#define CYREG_UDB_P1_U1_PLD_IT11 0x400f32ac
#define CYREG_UDB_P1_U1_PLD_ORT0 0x400f32b0
#define CYREG_UDB_P1_U1_PLD_ORT1 0x400f32b2
#define CYREG_UDB_P1_U1_PLD_ORT2 0x400f32b4
#define CYREG_UDB_P1_U1_PLD_ORT3 0x400f32b6
#define CYREG_UDB_P1_U1_PLD_MC_CFG_CEN_CONST 0x400f32b8
#define CYREG_UDB_P1_U1_PLD_MC_CFG_XORFB 0x400f32ba
#define CYREG_UDB_P1_U1_PLD_MC_SET_RESET 0x400f32bc
#define CYREG_UDB_P1_U1_PLD_MC_CFG_BYPASS 0x400f32be
#define CYREG_UDB_P1_U1_CFG0 0x400f32c0
#define CYREG_UDB_P1_U1_CFG1 0x400f32c1
#define CYREG_UDB_P1_U1_CFG2 0x400f32c2
#define CYREG_UDB_P1_U1_CFG3 0x400f32c3
#define CYREG_UDB_P1_U1_CFG4 0x400f32c4
#define CYREG_UDB_P1_U1_CFG5 0x400f32c5
#define CYREG_UDB_P1_U1_CFG6 0x400f32c6
#define CYREG_UDB_P1_U1_CFG7 0x400f32c7
#define CYREG_UDB_P1_U1_CFG8 0x400f32c8
#define CYREG_UDB_P1_U1_CFG9 0x400f32c9
#define CYREG_UDB_P1_U1_CFG10 0x400f32ca
#define CYREG_UDB_P1_U1_CFG11 0x400f32cb
#define CYREG_UDB_P1_U1_CFG12 0x400f32cc
#define CYREG_UDB_P1_U1_CFG13 0x400f32cd
#define CYREG_UDB_P1_U1_CFG14 0x400f32ce
#define CYREG_UDB_P1_U1_CFG15 0x400f32cf
#define CYREG_UDB_P1_U1_CFG16 0x400f32d0
#define CYREG_UDB_P1_U1_CFG17 0x400f32d1
#define CYREG_UDB_P1_U1_CFG18 0x400f32d2
#define CYREG_UDB_P1_U1_CFG19 0x400f32d3
#define CYREG_UDB_P1_U1_CFG20 0x400f32d4
#define CYREG_UDB_P1_U1_CFG21 0x400f32d5
#define CYREG_UDB_P1_U1_CFG22 0x400f32d6
#define CYREG_UDB_P1_U1_CFG23 0x400f32d7
#define CYREG_UDB_P1_U1_CFG24 0x400f32d8
#define CYREG_UDB_P1_U1_CFG25 0x400f32d9
#define CYREG_UDB_P1_U1_CFG26 0x400f32da
#define CYREG_UDB_P1_U1_CFG27 0x400f32db
#define CYREG_UDB_P1_U1_CFG28 0x400f32dc
#define CYREG_UDB_P1_U1_CFG29 0x400f32dd
#define CYREG_UDB_P1_U1_CFG30 0x400f32de
#define CYREG_UDB_P1_U1_CFG31 0x400f32df
#define CYREG_UDB_P1_U1_DCFG0 0x400f32e0
#define CYREG_UDB_P1_U1_DCFG1 0x400f32e2
#define CYREG_UDB_P1_U1_DCFG2 0x400f32e4
#define CYREG_UDB_P1_U1_DCFG3 0x400f32e6
#define CYREG_UDB_P1_U1_DCFG4 0x400f32e8
#define CYREG_UDB_P1_U1_DCFG5 0x400f32ea
#define CYREG_UDB_P1_U1_DCFG6 0x400f32ec
#define CYREG_UDB_P1_U1_DCFG7 0x400f32ee
#define CYDEV_UDB_P1_ROUTE_BASE 0x400f3300
#define CYDEV_UDB_P1_ROUTE_SIZE 0x00000100
#define CYREG_UDB_P1_ROUTE_HC0 0x400f3300
#define CYREG_UDB_P1_ROUTE_HC1 0x400f3301
#define CYREG_UDB_P1_ROUTE_HC2 0x400f3302
#define CYREG_UDB_P1_ROUTE_HC3 0x400f3303
#define CYREG_UDB_P1_ROUTE_HC4 0x400f3304
#define CYREG_UDB_P1_ROUTE_HC5 0x400f3305
#define CYREG_UDB_P1_ROUTE_HC6 0x400f3306
#define CYREG_UDB_P1_ROUTE_HC7 0x400f3307
#define CYREG_UDB_P1_ROUTE_HC8 0x400f3308
#define CYREG_UDB_P1_ROUTE_HC9 0x400f3309
#define CYREG_UDB_P1_ROUTE_HC10 0x400f330a
#define CYREG_UDB_P1_ROUTE_HC11 0x400f330b
#define CYREG_UDB_P1_ROUTE_HC12 0x400f330c
#define CYREG_UDB_P1_ROUTE_HC13 0x400f330d
#define CYREG_UDB_P1_ROUTE_HC14 0x400f330e
#define CYREG_UDB_P1_ROUTE_HC15 0x400f330f
#define CYREG_UDB_P1_ROUTE_HC16 0x400f3310
#define CYREG_UDB_P1_ROUTE_HC17 0x400f3311
#define CYREG_UDB_P1_ROUTE_HC18 0x400f3312
#define CYREG_UDB_P1_ROUTE_HC19 0x400f3313
#define CYREG_UDB_P1_ROUTE_HC20 0x400f3314
#define CYREG_UDB_P1_ROUTE_HC21 0x400f3315
#define CYREG_UDB_P1_ROUTE_HC22 0x400f3316
#define CYREG_UDB_P1_ROUTE_HC23 0x400f3317
#define CYREG_UDB_P1_ROUTE_HC24 0x400f3318
#define CYREG_UDB_P1_ROUTE_HC25 0x400f3319
#define CYREG_UDB_P1_ROUTE_HC26 0x400f331a
#define CYREG_UDB_P1_ROUTE_HC27 0x400f331b
#define CYREG_UDB_P1_ROUTE_HC28 0x400f331c
#define CYREG_UDB_P1_ROUTE_HC29 0x400f331d
#define CYREG_UDB_P1_ROUTE_HC30 0x400f331e
#define CYREG_UDB_P1_ROUTE_HC31 0x400f331f
#define CYREG_UDB_P1_ROUTE_HC32 0x400f3320
#define CYREG_UDB_P1_ROUTE_HC33 0x400f3321
#define CYREG_UDB_P1_ROUTE_HC34 0x400f3322
#define CYREG_UDB_P1_ROUTE_HC35 0x400f3323
#define CYREG_UDB_P1_ROUTE_HC36 0x400f3324
#define CYREG_UDB_P1_ROUTE_HC37 0x400f3325
#define CYREG_UDB_P1_ROUTE_HC38 0x400f3326
#define CYREG_UDB_P1_ROUTE_HC39 0x400f3327
#define CYREG_UDB_P1_ROUTE_HC40 0x400f3328
#define CYREG_UDB_P1_ROUTE_HC41 0x400f3329
#define CYREG_UDB_P1_ROUTE_HC42 0x400f332a
#define CYREG_UDB_P1_ROUTE_HC43 0x400f332b
#define CYREG_UDB_P1_ROUTE_HC44 0x400f332c
#define CYREG_UDB_P1_ROUTE_HC45 0x400f332d
#define CYREG_UDB_P1_ROUTE_HC46 0x400f332e
#define CYREG_UDB_P1_ROUTE_HC47 0x400f332f
#define CYREG_UDB_P1_ROUTE_HC48 0x400f3330
#define CYREG_UDB_P1_ROUTE_HC49 0x400f3331
#define CYREG_UDB_P1_ROUTE_HC50 0x400f3332
#define CYREG_UDB_P1_ROUTE_HC51 0x400f3333
#define CYREG_UDB_P1_ROUTE_HC52 0x400f3334
#define CYREG_UDB_P1_ROUTE_HC53 0x400f3335
#define CYREG_UDB_P1_ROUTE_HC54 0x400f3336
#define CYREG_UDB_P1_ROUTE_HC55 0x400f3337
#define CYREG_UDB_P1_ROUTE_HC56 0x400f3338
#define CYREG_UDB_P1_ROUTE_HC57 0x400f3339
#define CYREG_UDB_P1_ROUTE_HC58 0x400f333a
#define CYREG_UDB_P1_ROUTE_HC59 0x400f333b
#define CYREG_UDB_P1_ROUTE_HC60 0x400f333c
#define CYREG_UDB_P1_ROUTE_HC61 0x400f333d
#define CYREG_UDB_P1_ROUTE_HC62 0x400f333e
#define CYREG_UDB_P1_ROUTE_HC63 0x400f333f
#define CYREG_UDB_P1_ROUTE_HC64 0x400f3340
#define CYREG_UDB_P1_ROUTE_HC65 0x400f3341
#define CYREG_UDB_P1_ROUTE_HC66 0x400f3342
#define CYREG_UDB_P1_ROUTE_HC67 0x400f3343
#define CYREG_UDB_P1_ROUTE_HC68 0x400f3344
#define CYREG_UDB_P1_ROUTE_HC69 0x400f3345
#define CYREG_UDB_P1_ROUTE_HC70 0x400f3346
#define CYREG_UDB_P1_ROUTE_HC71 0x400f3347
#define CYREG_UDB_P1_ROUTE_HC72 0x400f3348
#define CYREG_UDB_P1_ROUTE_HC73 0x400f3349
#define CYREG_UDB_P1_ROUTE_HC74 0x400f334a
#define CYREG_UDB_P1_ROUTE_HC75 0x400f334b
#define CYREG_UDB_P1_ROUTE_HC76 0x400f334c
#define CYREG_UDB_P1_ROUTE_HC77 0x400f334d
#define CYREG_UDB_P1_ROUTE_HC78 0x400f334e
#define CYREG_UDB_P1_ROUTE_HC79 0x400f334f
#define CYREG_UDB_P1_ROUTE_HC80 0x400f3350
#define CYREG_UDB_P1_ROUTE_HC81 0x400f3351
#define CYREG_UDB_P1_ROUTE_HC82 0x400f3352
#define CYREG_UDB_P1_ROUTE_HC83 0x400f3353
#define CYREG_UDB_P1_ROUTE_HC84 0x400f3354
#define CYREG_UDB_P1_ROUTE_HC85 0x400f3355
#define CYREG_UDB_P1_ROUTE_HC86 0x400f3356
#define CYREG_UDB_P1_ROUTE_HC87 0x400f3357
#define CYREG_UDB_P1_ROUTE_HC88 0x400f3358
#define CYREG_UDB_P1_ROUTE_HC89 0x400f3359
#define CYREG_UDB_P1_ROUTE_HC90 0x400f335a
#define CYREG_UDB_P1_ROUTE_HC91 0x400f335b
#define CYREG_UDB_P1_ROUTE_HC92 0x400f335c
#define CYREG_UDB_P1_ROUTE_HC93 0x400f335d
#define CYREG_UDB_P1_ROUTE_HC94 0x400f335e
#define CYREG_UDB_P1_ROUTE_HC95 0x400f335f
#define CYREG_UDB_P1_ROUTE_HC96 0x400f3360
#define CYREG_UDB_P1_ROUTE_HC97 0x400f3361
#define CYREG_UDB_P1_ROUTE_HC98 0x400f3362
#define CYREG_UDB_P1_ROUTE_HC99 0x400f3363
#define CYREG_UDB_P1_ROUTE_HC100 0x400f3364
#define CYREG_UDB_P1_ROUTE_HC101 0x400f3365
#define CYREG_UDB_P1_ROUTE_HC102 0x400f3366
#define CYREG_UDB_P1_ROUTE_HC103 0x400f3367
#define CYREG_UDB_P1_ROUTE_HC104 0x400f3368
#define CYREG_UDB_P1_ROUTE_HC105 0x400f3369
#define CYREG_UDB_P1_ROUTE_HC106 0x400f336a
#define CYREG_UDB_P1_ROUTE_HC107 0x400f336b
#define CYREG_UDB_P1_ROUTE_HC108 0x400f336c
#define CYREG_UDB_P1_ROUTE_HC109 0x400f336d
#define CYREG_UDB_P1_ROUTE_HC110 0x400f336e
#define CYREG_UDB_P1_ROUTE_HC111 0x400f336f
#define CYREG_UDB_P1_ROUTE_HC112 0x400f3370
#define CYREG_UDB_P1_ROUTE_HC113 0x400f3371
#define CYREG_UDB_P1_ROUTE_HC114 0x400f3372
#define CYREG_UDB_P1_ROUTE_HC115 0x400f3373
#define CYREG_UDB_P1_ROUTE_HC116 0x400f3374
#define CYREG_UDB_P1_ROUTE_HC117 0x400f3375
#define CYREG_UDB_P1_ROUTE_HC118 0x400f3376
#define CYREG_UDB_P1_ROUTE_HC119 0x400f3377
#define CYREG_UDB_P1_ROUTE_HC120 0x400f3378
#define CYREG_UDB_P1_ROUTE_HC121 0x400f3379
#define CYREG_UDB_P1_ROUTE_HC122 0x400f337a
#define CYREG_UDB_P1_ROUTE_HC123 0x400f337b
#define CYREG_UDB_P1_ROUTE_HC124 0x400f337c
#define CYREG_UDB_P1_ROUTE_HC125 0x400f337d
#define CYREG_UDB_P1_ROUTE_HC126 0x400f337e
#define CYREG_UDB_P1_ROUTE_HC127 0x400f337f
#define CYREG_UDB_P1_ROUTE_HV_L0 0x400f3380
#define CYREG_UDB_P1_ROUTE_HV_L1 0x400f3381
#define CYREG_UDB_P1_ROUTE_HV_L2 0x400f3382
#define CYREG_UDB_P1_ROUTE_HV_L3 0x400f3383
#define CYREG_UDB_P1_ROUTE_HV_L4 0x400f3384
#define CYREG_UDB_P1_ROUTE_HV_L5 0x400f3385
#define CYREG_UDB_P1_ROUTE_HV_L6 0x400f3386
#define CYREG_UDB_P1_ROUTE_HV_L7 0x400f3387
#define CYREG_UDB_P1_ROUTE_HV_L8 0x400f3388
#define CYREG_UDB_P1_ROUTE_HV_L9 0x400f3389
#define CYREG_UDB_P1_ROUTE_HV_L10 0x400f338a
#define CYREG_UDB_P1_ROUTE_HV_L11 0x400f338b
#define CYREG_UDB_P1_ROUTE_HV_L12 0x400f338c
#define CYREG_UDB_P1_ROUTE_HV_L13 0x400f338d
#define CYREG_UDB_P1_ROUTE_HV_L14 0x400f338e
#define CYREG_UDB_P1_ROUTE_HV_L15 0x400f338f
#define CYREG_UDB_P1_ROUTE_HS0 0x400f3390
#define CYREG_UDB_P1_ROUTE_HS1 0x400f3391
#define CYREG_UDB_P1_ROUTE_HS2 0x400f3392
#define CYREG_UDB_P1_ROUTE_HS3 0x400f3393
#define CYREG_UDB_P1_ROUTE_HS4 0x400f3394
#define CYREG_UDB_P1_ROUTE_HS5 0x400f3395
#define CYREG_UDB_P1_ROUTE_HS6 0x400f3396
#define CYREG_UDB_P1_ROUTE_HS7 0x400f3397
#define CYREG_UDB_P1_ROUTE_HS8 0x400f3398
#define CYREG_UDB_P1_ROUTE_HS9 0x400f3399
#define CYREG_UDB_P1_ROUTE_HS10 0x400f339a
#define CYREG_UDB_P1_ROUTE_HS11 0x400f339b
#define CYREG_UDB_P1_ROUTE_HS12 0x400f339c
#define CYREG_UDB_P1_ROUTE_HS13 0x400f339d
#define CYREG_UDB_P1_ROUTE_HS14 0x400f339e
#define CYREG_UDB_P1_ROUTE_HS15 0x400f339f
#define CYREG_UDB_P1_ROUTE_HS16 0x400f33a0
#define CYREG_UDB_P1_ROUTE_HS17 0x400f33a1
#define CYREG_UDB_P1_ROUTE_HS18 0x400f33a2
#define CYREG_UDB_P1_ROUTE_HS19 0x400f33a3
#define CYREG_UDB_P1_ROUTE_HS20 0x400f33a4
#define CYREG_UDB_P1_ROUTE_HS21 0x400f33a5
#define CYREG_UDB_P1_ROUTE_HS22 0x400f33a6
#define CYREG_UDB_P1_ROUTE_HS23 0x400f33a7
#define CYREG_UDB_P1_ROUTE_HV_R0 0x400f33a8
#define CYREG_UDB_P1_ROUTE_HV_R1 0x400f33a9
#define CYREG_UDB_P1_ROUTE_HV_R2 0x400f33aa
#define CYREG_UDB_P1_ROUTE_HV_R3 0x400f33ab
#define CYREG_UDB_P1_ROUTE_HV_R4 0x400f33ac
#define CYREG_UDB_P1_ROUTE_HV_R5 0x400f33ad
#define CYREG_UDB_P1_ROUTE_HV_R6 0x400f33ae
#define CYREG_UDB_P1_ROUTE_HV_R7 0x400f33af
#define CYREG_UDB_P1_ROUTE_HV_R8 0x400f33b0
#define CYREG_UDB_P1_ROUTE_HV_R9 0x400f33b1
#define CYREG_UDB_P1_ROUTE_HV_R10 0x400f33b2
#define CYREG_UDB_P1_ROUTE_HV_R11 0x400f33b3
#define CYREG_UDB_P1_ROUTE_HV_R12 0x400f33b4
#define CYREG_UDB_P1_ROUTE_HV_R13 0x400f33b5
#define CYREG_UDB_P1_ROUTE_HV_R14 0x400f33b6
#define CYREG_UDB_P1_ROUTE_HV_R15 0x400f33b7
#define CYREG_UDB_P1_ROUTE_PLD0IN0 0x400f33c0
#define CYREG_UDB_P1_ROUTE_PLD0IN1 0x400f33c2
#define CYREG_UDB_P1_ROUTE_PLD0IN2 0x400f33c4
#define CYREG_UDB_P1_ROUTE_PLD1IN0 0x400f33ca
#define CYREG_UDB_P1_ROUTE_PLD1IN1 0x400f33cc
#define CYREG_UDB_P1_ROUTE_PLD1IN2 0x400f33ce
#define CYREG_UDB_P1_ROUTE_DPIN0 0x400f33d0
#define CYREG_UDB_P1_ROUTE_DPIN1 0x400f33d2
#define CYREG_UDB_P1_ROUTE_SCIN 0x400f33d6
#define CYREG_UDB_P1_ROUTE_SCIOIN 0x400f33d8
#define CYREG_UDB_P1_ROUTE_RCIN 0x400f33de
#define CYREG_UDB_P1_ROUTE_VS0 0x400f33e0
#define CYREG_UDB_P1_ROUTE_VS1 0x400f33e2
#define CYREG_UDB_P1_ROUTE_VS2 0x400f33e4
#define CYREG_UDB_P1_ROUTE_VS3 0x400f33e6
#define CYREG_UDB_P1_ROUTE_VS4 0x400f33e8
#define CYREG_UDB_P1_ROUTE_VS5 0x400f33ea
#define CYREG_UDB_P1_ROUTE_VS6 0x400f33ec
#define CYREG_UDB_P1_ROUTE_VS7 0x400f33ee
#define CYDEV_UDB_DSI0_BASE 0x400f4000
#define CYDEV_UDB_DSI0_SIZE 0x00000100
#define CYREG_UDB_DSI0_HC0 0x400f4000
#define CYREG_UDB_DSI0_HC1 0x400f4001
#define CYREG_UDB_DSI0_HC2 0x400f4002
#define CYREG_UDB_DSI0_HC3 0x400f4003
#define CYREG_UDB_DSI0_HC4 0x400f4004
#define CYREG_UDB_DSI0_HC5 0x400f4005
#define CYREG_UDB_DSI0_HC6 0x400f4006
#define CYREG_UDB_DSI0_HC7 0x400f4007
#define CYREG_UDB_DSI0_HC8 0x400f4008
#define CYREG_UDB_DSI0_HC9 0x400f4009
#define CYREG_UDB_DSI0_HC10 0x400f400a
#define CYREG_UDB_DSI0_HC11 0x400f400b
#define CYREG_UDB_DSI0_HC12 0x400f400c
#define CYREG_UDB_DSI0_HC13 0x400f400d
#define CYREG_UDB_DSI0_HC14 0x400f400e
#define CYREG_UDB_DSI0_HC15 0x400f400f
#define CYREG_UDB_DSI0_HC16 0x400f4010
#define CYREG_UDB_DSI0_HC17 0x400f4011
#define CYREG_UDB_DSI0_HC18 0x400f4012
#define CYREG_UDB_DSI0_HC19 0x400f4013
#define CYREG_UDB_DSI0_HC20 0x400f4014
#define CYREG_UDB_DSI0_HC21 0x400f4015
#define CYREG_UDB_DSI0_HC22 0x400f4016
#define CYREG_UDB_DSI0_HC23 0x400f4017
#define CYREG_UDB_DSI0_HC24 0x400f4018
#define CYREG_UDB_DSI0_HC25 0x400f4019
#define CYREG_UDB_DSI0_HC26 0x400f401a
#define CYREG_UDB_DSI0_HC27 0x400f401b
#define CYREG_UDB_DSI0_HC28 0x400f401c
#define CYREG_UDB_DSI0_HC29 0x400f401d
#define CYREG_UDB_DSI0_HC30 0x400f401e
#define CYREG_UDB_DSI0_HC31 0x400f401f
#define CYREG_UDB_DSI0_HC32 0x400f4020
#define CYREG_UDB_DSI0_HC33 0x400f4021
#define CYREG_UDB_DSI0_HC34 0x400f4022
#define CYREG_UDB_DSI0_HC35 0x400f4023
#define CYREG_UDB_DSI0_HC36 0x400f4024
#define CYREG_UDB_DSI0_HC37 0x400f4025
#define CYREG_UDB_DSI0_HC38 0x400f4026
#define CYREG_UDB_DSI0_HC39 0x400f4027
#define CYREG_UDB_DSI0_HC40 0x400f4028
#define CYREG_UDB_DSI0_HC41 0x400f4029
#define CYREG_UDB_DSI0_HC42 0x400f402a
#define CYREG_UDB_DSI0_HC43 0x400f402b
#define CYREG_UDB_DSI0_HC44 0x400f402c
#define CYREG_UDB_DSI0_HC45 0x400f402d
#define CYREG_UDB_DSI0_HC46 0x400f402e
#define CYREG_UDB_DSI0_HC47 0x400f402f
#define CYREG_UDB_DSI0_HC48 0x400f4030
#define CYREG_UDB_DSI0_HC49 0x400f4031
#define CYREG_UDB_DSI0_HC50 0x400f4032
#define CYREG_UDB_DSI0_HC51 0x400f4033
#define CYREG_UDB_DSI0_HC52 0x400f4034
#define CYREG_UDB_DSI0_HC53 0x400f4035
#define CYREG_UDB_DSI0_HC54 0x400f4036
#define CYREG_UDB_DSI0_HC55 0x400f4037
#define CYREG_UDB_DSI0_HC56 0x400f4038
#define CYREG_UDB_DSI0_HC57 0x400f4039
#define CYREG_UDB_DSI0_HC58 0x400f403a
#define CYREG_UDB_DSI0_HC59 0x400f403b
#define CYREG_UDB_DSI0_HC60 0x400f403c
#define CYREG_UDB_DSI0_HC61 0x400f403d
#define CYREG_UDB_DSI0_HC62 0x400f403e
#define CYREG_UDB_DSI0_HC63 0x400f403f
#define CYREG_UDB_DSI0_HC64 0x400f4040
#define CYREG_UDB_DSI0_HC65 0x400f4041
#define CYREG_UDB_DSI0_HC66 0x400f4042
#define CYREG_UDB_DSI0_HC67 0x400f4043
#define CYREG_UDB_DSI0_HC68 0x400f4044
#define CYREG_UDB_DSI0_HC69 0x400f4045
#define CYREG_UDB_DSI0_HC70 0x400f4046
#define CYREG_UDB_DSI0_HC71 0x400f4047
#define CYREG_UDB_DSI0_HC72 0x400f4048
#define CYREG_UDB_DSI0_HC73 0x400f4049
#define CYREG_UDB_DSI0_HC74 0x400f404a
#define CYREG_UDB_DSI0_HC75 0x400f404b
#define CYREG_UDB_DSI0_HC76 0x400f404c
#define CYREG_UDB_DSI0_HC77 0x400f404d
#define CYREG_UDB_DSI0_HC78 0x400f404e
#define CYREG_UDB_DSI0_HC79 0x400f404f
#define CYREG_UDB_DSI0_HC80 0x400f4050
#define CYREG_UDB_DSI0_HC81 0x400f4051
#define CYREG_UDB_DSI0_HC82 0x400f4052
#define CYREG_UDB_DSI0_HC83 0x400f4053
#define CYREG_UDB_DSI0_HC84 0x400f4054
#define CYREG_UDB_DSI0_HC85 0x400f4055
#define CYREG_UDB_DSI0_HC86 0x400f4056
#define CYREG_UDB_DSI0_HC87 0x400f4057
#define CYREG_UDB_DSI0_HC88 0x400f4058
#define CYREG_UDB_DSI0_HC89 0x400f4059
#define CYREG_UDB_DSI0_HC90 0x400f405a
#define CYREG_UDB_DSI0_HC91 0x400f405b
#define CYREG_UDB_DSI0_HC92 0x400f405c
#define CYREG_UDB_DSI0_HC93 0x400f405d
#define CYREG_UDB_DSI0_HC94 0x400f405e
#define CYREG_UDB_DSI0_HC95 0x400f405f
#define CYREG_UDB_DSI0_HC96 0x400f4060
#define CYREG_UDB_DSI0_HC97 0x400f4061
#define CYREG_UDB_DSI0_HC98 0x400f4062
#define CYREG_UDB_DSI0_HC99 0x400f4063
#define CYREG_UDB_DSI0_HC100 0x400f4064
#define CYREG_UDB_DSI0_HC101 0x400f4065
#define CYREG_UDB_DSI0_HC102 0x400f4066
#define CYREG_UDB_DSI0_HC103 0x400f4067
#define CYREG_UDB_DSI0_HC104 0x400f4068
#define CYREG_UDB_DSI0_HC105 0x400f4069
#define CYREG_UDB_DSI0_HC106 0x400f406a
#define CYREG_UDB_DSI0_HC107 0x400f406b
#define CYREG_UDB_DSI0_HC108 0x400f406c
#define CYREG_UDB_DSI0_HC109 0x400f406d
#define CYREG_UDB_DSI0_HC110 0x400f406e
#define CYREG_UDB_DSI0_HC111 0x400f406f
#define CYREG_UDB_DSI0_HC112 0x400f4070
#define CYREG_UDB_DSI0_HC113 0x400f4071
#define CYREG_UDB_DSI0_HC114 0x400f4072
#define CYREG_UDB_DSI0_HC115 0x400f4073
#define CYREG_UDB_DSI0_HC116 0x400f4074
#define CYREG_UDB_DSI0_HC117 0x400f4075
#define CYREG_UDB_DSI0_HC118 0x400f4076
#define CYREG_UDB_DSI0_HC119 0x400f4077
#define CYREG_UDB_DSI0_HC120 0x400f4078
#define CYREG_UDB_DSI0_HC121 0x400f4079
#define CYREG_UDB_DSI0_HC122 0x400f407a
#define CYREG_UDB_DSI0_HC123 0x400f407b
#define CYREG_UDB_DSI0_HC124 0x400f407c
#define CYREG_UDB_DSI0_HC125 0x400f407d
#define CYREG_UDB_DSI0_HC126 0x400f407e
#define CYREG_UDB_DSI0_HC127 0x400f407f
#define CYREG_UDB_DSI0_HV_L0 0x400f4080
#define CYREG_UDB_DSI0_HV_L1 0x400f4081
#define CYREG_UDB_DSI0_HV_L2 0x400f4082
#define CYREG_UDB_DSI0_HV_L3 0x400f4083
#define CYREG_UDB_DSI0_HV_L4 0x400f4084
#define CYREG_UDB_DSI0_HV_L5 0x400f4085
#define CYREG_UDB_DSI0_HV_L6 0x400f4086
#define CYREG_UDB_DSI0_HV_L7 0x400f4087
#define CYREG_UDB_DSI0_HV_L8 0x400f4088
#define CYREG_UDB_DSI0_HV_L9 0x400f4089
#define CYREG_UDB_DSI0_HV_L10 0x400f408a
#define CYREG_UDB_DSI0_HV_L11 0x400f408b
#define CYREG_UDB_DSI0_HV_L12 0x400f408c
#define CYREG_UDB_DSI0_HV_L13 0x400f408d
#define CYREG_UDB_DSI0_HV_L14 0x400f408e
#define CYREG_UDB_DSI0_HV_L15 0x400f408f
#define CYREG_UDB_DSI0_HS0 0x400f4090
#define CYREG_UDB_DSI0_HS1 0x400f4091
#define CYREG_UDB_DSI0_HS2 0x400f4092
#define CYREG_UDB_DSI0_HS3 0x400f4093
#define CYREG_UDB_DSI0_HS4 0x400f4094
#define CYREG_UDB_DSI0_HS5 0x400f4095
#define CYREG_UDB_DSI0_HS6 0x400f4096
#define CYREG_UDB_DSI0_HS7 0x400f4097
#define CYREG_UDB_DSI0_HS8 0x400f4098
#define CYREG_UDB_DSI0_HS9 0x400f4099
#define CYREG_UDB_DSI0_HS10 0x400f409a
#define CYREG_UDB_DSI0_HS11 0x400f409b
#define CYREG_UDB_DSI0_HS12 0x400f409c
#define CYREG_UDB_DSI0_HS13 0x400f409d
#define CYREG_UDB_DSI0_HS14 0x400f409e
#define CYREG_UDB_DSI0_HS15 0x400f409f
#define CYREG_UDB_DSI0_HS16 0x400f40a0
#define CYREG_UDB_DSI0_HS17 0x400f40a1
#define CYREG_UDB_DSI0_HS18 0x400f40a2
#define CYREG_UDB_DSI0_HS19 0x400f40a3
#define CYREG_UDB_DSI0_HS20 0x400f40a4
#define CYREG_UDB_DSI0_HS21 0x400f40a5
#define CYREG_UDB_DSI0_HS22 0x400f40a6
#define CYREG_UDB_DSI0_HS23 0x400f40a7
#define CYREG_UDB_DSI0_HV_R0 0x400f40a8
#define CYREG_UDB_DSI0_HV_R1 0x400f40a9
#define CYREG_UDB_DSI0_HV_R2 0x400f40aa
#define CYREG_UDB_DSI0_HV_R3 0x400f40ab
#define CYREG_UDB_DSI0_HV_R4 0x400f40ac
#define CYREG_UDB_DSI0_HV_R5 0x400f40ad
#define CYREG_UDB_DSI0_HV_R6 0x400f40ae
#define CYREG_UDB_DSI0_HV_R7 0x400f40af
#define CYREG_UDB_DSI0_HV_R8 0x400f40b0
#define CYREG_UDB_DSI0_HV_R9 0x400f40b1
#define CYREG_UDB_DSI0_HV_R10 0x400f40b2
#define CYREG_UDB_DSI0_HV_R11 0x400f40b3
#define CYREG_UDB_DSI0_HV_R12 0x400f40b4
#define CYREG_UDB_DSI0_HV_R13 0x400f40b5
#define CYREG_UDB_DSI0_HV_R14 0x400f40b6
#define CYREG_UDB_DSI0_HV_R15 0x400f40b7
#define CYREG_UDB_DSI0_DSIINP0 0x400f40c0
#define CYREG_UDB_DSI0_DSIINP1 0x400f40c2
#define CYREG_UDB_DSI0_DSIINP2 0x400f40c4
#define CYREG_UDB_DSI0_DSIINP3 0x400f40c6
#define CYREG_UDB_DSI0_DSIINP4 0x400f40c8
#define CYREG_UDB_DSI0_DSIINP5 0x400f40ca
#define CYREG_UDB_DSI0_DSIOUTP0 0x400f40cc
#define CYREG_UDB_DSI0_DSIOUTP1 0x400f40ce
#define CYREG_UDB_DSI0_DSIOUTP2 0x400f40d0
#define CYREG_UDB_DSI0_DSIOUTP3 0x400f40d2
#define CYREG_UDB_DSI0_DSIOUTT0 0x400f40d4
#define CYREG_UDB_DSI0_DSIOUTT1 0x400f40d6
#define CYREG_UDB_DSI0_DSIOUTT2 0x400f40d8
#define CYREG_UDB_DSI0_DSIOUTT3 0x400f40da
#define CYREG_UDB_DSI0_DSIOUTT4 0x400f40dc
#define CYREG_UDB_DSI0_DSIOUTT5 0x400f40de
#define CYREG_UDB_DSI0_VS0 0x400f40e0
#define CYREG_UDB_DSI0_VS1 0x400f40e2
#define CYREG_UDB_DSI0_VS2 0x400f40e4
#define CYREG_UDB_DSI0_VS3 0x400f40e6
#define CYREG_UDB_DSI0_VS4 0x400f40e8
#define CYREG_UDB_DSI0_VS5 0x400f40ea
#define CYREG_UDB_DSI0_VS6 0x400f40ec
#define CYREG_UDB_DSI0_VS7 0x400f40ee
#define CYDEV_UDB_DSI1_BASE 0x400f4100
#define CYDEV_UDB_DSI1_SIZE 0x00000100
#define CYREG_UDB_DSI1_HC0 0x400f4100
#define CYREG_UDB_DSI1_HC1 0x400f4101
#define CYREG_UDB_DSI1_HC2 0x400f4102
#define CYREG_UDB_DSI1_HC3 0x400f4103
#define CYREG_UDB_DSI1_HC4 0x400f4104
#define CYREG_UDB_DSI1_HC5 0x400f4105
#define CYREG_UDB_DSI1_HC6 0x400f4106
#define CYREG_UDB_DSI1_HC7 0x400f4107
#define CYREG_UDB_DSI1_HC8 0x400f4108
#define CYREG_UDB_DSI1_HC9 0x400f4109
#define CYREG_UDB_DSI1_HC10 0x400f410a
#define CYREG_UDB_DSI1_HC11 0x400f410b
#define CYREG_UDB_DSI1_HC12 0x400f410c
#define CYREG_UDB_DSI1_HC13 0x400f410d
#define CYREG_UDB_DSI1_HC14 0x400f410e
#define CYREG_UDB_DSI1_HC15 0x400f410f
#define CYREG_UDB_DSI1_HC16 0x400f4110
#define CYREG_UDB_DSI1_HC17 0x400f4111
#define CYREG_UDB_DSI1_HC18 0x400f4112
#define CYREG_UDB_DSI1_HC19 0x400f4113
#define CYREG_UDB_DSI1_HC20 0x400f4114
#define CYREG_UDB_DSI1_HC21 0x400f4115
#define CYREG_UDB_DSI1_HC22 0x400f4116
#define CYREG_UDB_DSI1_HC23 0x400f4117
#define CYREG_UDB_DSI1_HC24 0x400f4118
#define CYREG_UDB_DSI1_HC25 0x400f4119
#define CYREG_UDB_DSI1_HC26 0x400f411a
#define CYREG_UDB_DSI1_HC27 0x400f411b
#define CYREG_UDB_DSI1_HC28 0x400f411c
#define CYREG_UDB_DSI1_HC29 0x400f411d
#define CYREG_UDB_DSI1_HC30 0x400f411e
#define CYREG_UDB_DSI1_HC31 0x400f411f
#define CYREG_UDB_DSI1_HC32 0x400f4120
#define CYREG_UDB_DSI1_HC33 0x400f4121
#define CYREG_UDB_DSI1_HC34 0x400f4122
#define CYREG_UDB_DSI1_HC35 0x400f4123
#define CYREG_UDB_DSI1_HC36 0x400f4124
#define CYREG_UDB_DSI1_HC37 0x400f4125
#define CYREG_UDB_DSI1_HC38 0x400f4126
#define CYREG_UDB_DSI1_HC39 0x400f4127
#define CYREG_UDB_DSI1_HC40 0x400f4128
#define CYREG_UDB_DSI1_HC41 0x400f4129
#define CYREG_UDB_DSI1_HC42 0x400f412a
#define CYREG_UDB_DSI1_HC43 0x400f412b
#define CYREG_UDB_DSI1_HC44 0x400f412c
#define CYREG_UDB_DSI1_HC45 0x400f412d
#define CYREG_UDB_DSI1_HC46 0x400f412e
#define CYREG_UDB_DSI1_HC47 0x400f412f
#define CYREG_UDB_DSI1_HC48 0x400f4130
#define CYREG_UDB_DSI1_HC49 0x400f4131
#define CYREG_UDB_DSI1_HC50 0x400f4132
#define CYREG_UDB_DSI1_HC51 0x400f4133
#define CYREG_UDB_DSI1_HC52 0x400f4134
#define CYREG_UDB_DSI1_HC53 0x400f4135
#define CYREG_UDB_DSI1_HC54 0x400f4136
#define CYREG_UDB_DSI1_HC55 0x400f4137
#define CYREG_UDB_DSI1_HC56 0x400f4138
#define CYREG_UDB_DSI1_HC57 0x400f4139
#define CYREG_UDB_DSI1_HC58 0x400f413a
#define CYREG_UDB_DSI1_HC59 0x400f413b
#define CYREG_UDB_DSI1_HC60 0x400f413c
#define CYREG_UDB_DSI1_HC61 0x400f413d
#define CYREG_UDB_DSI1_HC62 0x400f413e
#define CYREG_UDB_DSI1_HC63 0x400f413f
#define CYREG_UDB_DSI1_HC64 0x400f4140
#define CYREG_UDB_DSI1_HC65 0x400f4141
#define CYREG_UDB_DSI1_HC66 0x400f4142
#define CYREG_UDB_DSI1_HC67 0x400f4143
#define CYREG_UDB_DSI1_HC68 0x400f4144
#define CYREG_UDB_DSI1_HC69 0x400f4145
#define CYREG_UDB_DSI1_HC70 0x400f4146
#define CYREG_UDB_DSI1_HC71 0x400f4147
#define CYREG_UDB_DSI1_HC72 0x400f4148
#define CYREG_UDB_DSI1_HC73 0x400f4149
#define CYREG_UDB_DSI1_HC74 0x400f414a
#define CYREG_UDB_DSI1_HC75 0x400f414b
#define CYREG_UDB_DSI1_HC76 0x400f414c
#define CYREG_UDB_DSI1_HC77 0x400f414d
#define CYREG_UDB_DSI1_HC78 0x400f414e
#define CYREG_UDB_DSI1_HC79 0x400f414f
#define CYREG_UDB_DSI1_HC80 0x400f4150
#define CYREG_UDB_DSI1_HC81 0x400f4151
#define CYREG_UDB_DSI1_HC82 0x400f4152
#define CYREG_UDB_DSI1_HC83 0x400f4153
#define CYREG_UDB_DSI1_HC84 0x400f4154
#define CYREG_UDB_DSI1_HC85 0x400f4155
#define CYREG_UDB_DSI1_HC86 0x400f4156
#define CYREG_UDB_DSI1_HC87 0x400f4157
#define CYREG_UDB_DSI1_HC88 0x400f4158
#define CYREG_UDB_DSI1_HC89 0x400f4159
#define CYREG_UDB_DSI1_HC90 0x400f415a
#define CYREG_UDB_DSI1_HC91 0x400f415b
#define CYREG_UDB_DSI1_HC92 0x400f415c
#define CYREG_UDB_DSI1_HC93 0x400f415d
#define CYREG_UDB_DSI1_HC94 0x400f415e
#define CYREG_UDB_DSI1_HC95 0x400f415f
#define CYREG_UDB_DSI1_HC96 0x400f4160
#define CYREG_UDB_DSI1_HC97 0x400f4161
#define CYREG_UDB_DSI1_HC98 0x400f4162
#define CYREG_UDB_DSI1_HC99 0x400f4163
#define CYREG_UDB_DSI1_HC100 0x400f4164
#define CYREG_UDB_DSI1_HC101 0x400f4165
#define CYREG_UDB_DSI1_HC102 0x400f4166
#define CYREG_UDB_DSI1_HC103 0x400f4167
#define CYREG_UDB_DSI1_HC104 0x400f4168
#define CYREG_UDB_DSI1_HC105 0x400f4169
#define CYREG_UDB_DSI1_HC106 0x400f416a
#define CYREG_UDB_DSI1_HC107 0x400f416b
#define CYREG_UDB_DSI1_HC108 0x400f416c
#define CYREG_UDB_DSI1_HC109 0x400f416d
#define CYREG_UDB_DSI1_HC110 0x400f416e
#define CYREG_UDB_DSI1_HC111 0x400f416f
#define CYREG_UDB_DSI1_HC112 0x400f4170
#define CYREG_UDB_DSI1_HC113 0x400f4171
#define CYREG_UDB_DSI1_HC114 0x400f4172
#define CYREG_UDB_DSI1_HC115 0x400f4173
#define CYREG_UDB_DSI1_HC116 0x400f4174
#define CYREG_UDB_DSI1_HC117 0x400f4175
#define CYREG_UDB_DSI1_HC118 0x400f4176
#define CYREG_UDB_DSI1_HC119 0x400f4177
#define CYREG_UDB_DSI1_HC120 0x400f4178
#define CYREG_UDB_DSI1_HC121 0x400f4179
#define CYREG_UDB_DSI1_HC122 0x400f417a
#define CYREG_UDB_DSI1_HC123 0x400f417b
#define CYREG_UDB_DSI1_HC124 0x400f417c
#define CYREG_UDB_DSI1_HC125 0x400f417d
#define CYREG_UDB_DSI1_HC126 0x400f417e
#define CYREG_UDB_DSI1_HC127 0x400f417f
#define CYREG_UDB_DSI1_HV_L0 0x400f4180
#define CYREG_UDB_DSI1_HV_L1 0x400f4181
#define CYREG_UDB_DSI1_HV_L2 0x400f4182
#define CYREG_UDB_DSI1_HV_L3 0x400f4183
#define CYREG_UDB_DSI1_HV_L4 0x400f4184
#define CYREG_UDB_DSI1_HV_L5 0x400f4185
#define CYREG_UDB_DSI1_HV_L6 0x400f4186
#define CYREG_UDB_DSI1_HV_L7 0x400f4187
#define CYREG_UDB_DSI1_HV_L8 0x400f4188
#define CYREG_UDB_DSI1_HV_L9 0x400f4189
#define CYREG_UDB_DSI1_HV_L10 0x400f418a
#define CYREG_UDB_DSI1_HV_L11 0x400f418b
#define CYREG_UDB_DSI1_HV_L12 0x400f418c
#define CYREG_UDB_DSI1_HV_L13 0x400f418d
#define CYREG_UDB_DSI1_HV_L14 0x400f418e
#define CYREG_UDB_DSI1_HV_L15 0x400f418f
#define CYREG_UDB_DSI1_HS0 0x400f4190
#define CYREG_UDB_DSI1_HS1 0x400f4191
#define CYREG_UDB_DSI1_HS2 0x400f4192
#define CYREG_UDB_DSI1_HS3 0x400f4193
#define CYREG_UDB_DSI1_HS4 0x400f4194
#define CYREG_UDB_DSI1_HS5 0x400f4195
#define CYREG_UDB_DSI1_HS6 0x400f4196
#define CYREG_UDB_DSI1_HS7 0x400f4197
#define CYREG_UDB_DSI1_HS8 0x400f4198
#define CYREG_UDB_DSI1_HS9 0x400f4199
#define CYREG_UDB_DSI1_HS10 0x400f419a
#define CYREG_UDB_DSI1_HS11 0x400f419b
#define CYREG_UDB_DSI1_HS12 0x400f419c
#define CYREG_UDB_DSI1_HS13 0x400f419d
#define CYREG_UDB_DSI1_HS14 0x400f419e
#define CYREG_UDB_DSI1_HS15 0x400f419f
#define CYREG_UDB_DSI1_HS16 0x400f41a0
#define CYREG_UDB_DSI1_HS17 0x400f41a1
#define CYREG_UDB_DSI1_HS18 0x400f41a2
#define CYREG_UDB_DSI1_HS19 0x400f41a3
#define CYREG_UDB_DSI1_HS20 0x400f41a4
#define CYREG_UDB_DSI1_HS21 0x400f41a5
#define CYREG_UDB_DSI1_HS22 0x400f41a6
#define CYREG_UDB_DSI1_HS23 0x400f41a7
#define CYREG_UDB_DSI1_HV_R0 0x400f41a8
#define CYREG_UDB_DSI1_HV_R1 0x400f41a9
#define CYREG_UDB_DSI1_HV_R2 0x400f41aa
#define CYREG_UDB_DSI1_HV_R3 0x400f41ab
#define CYREG_UDB_DSI1_HV_R4 0x400f41ac
#define CYREG_UDB_DSI1_HV_R5 0x400f41ad
#define CYREG_UDB_DSI1_HV_R6 0x400f41ae
#define CYREG_UDB_DSI1_HV_R7 0x400f41af
#define CYREG_UDB_DSI1_HV_R8 0x400f41b0
#define CYREG_UDB_DSI1_HV_R9 0x400f41b1
#define CYREG_UDB_DSI1_HV_R10 0x400f41b2
#define CYREG_UDB_DSI1_HV_R11 0x400f41b3
#define CYREG_UDB_DSI1_HV_R12 0x400f41b4
#define CYREG_UDB_DSI1_HV_R13 0x400f41b5
#define CYREG_UDB_DSI1_HV_R14 0x400f41b6
#define CYREG_UDB_DSI1_HV_R15 0x400f41b7
#define CYREG_UDB_DSI1_DSIINP0 0x400f41c0
#define CYREG_UDB_DSI1_DSIINP1 0x400f41c2
#define CYREG_UDB_DSI1_DSIINP2 0x400f41c4
#define CYREG_UDB_DSI1_DSIINP3 0x400f41c6
#define CYREG_UDB_DSI1_DSIINP4 0x400f41c8
#define CYREG_UDB_DSI1_DSIINP5 0x400f41ca
#define CYREG_UDB_DSI1_DSIOUTP0 0x400f41cc
#define CYREG_UDB_DSI1_DSIOUTP1 0x400f41ce
#define CYREG_UDB_DSI1_DSIOUTP2 0x400f41d0
#define CYREG_UDB_DSI1_DSIOUTP3 0x400f41d2
#define CYREG_UDB_DSI1_DSIOUTT0 0x400f41d4
#define CYREG_UDB_DSI1_DSIOUTT1 0x400f41d6
#define CYREG_UDB_DSI1_DSIOUTT2 0x400f41d8
#define CYREG_UDB_DSI1_DSIOUTT3 0x400f41da
#define CYREG_UDB_DSI1_DSIOUTT4 0x400f41dc
#define CYREG_UDB_DSI1_DSIOUTT5 0x400f41de
#define CYREG_UDB_DSI1_VS0 0x400f41e0
#define CYREG_UDB_DSI1_VS1 0x400f41e2
#define CYREG_UDB_DSI1_VS2 0x400f41e4
#define CYREG_UDB_DSI1_VS3 0x400f41e6
#define CYREG_UDB_DSI1_VS4 0x400f41e8
#define CYREG_UDB_DSI1_VS5 0x400f41ea
#define CYREG_UDB_DSI1_VS6 0x400f41ec
#define CYREG_UDB_DSI1_VS7 0x400f41ee
#define CYDEV_UDB_DSI2_BASE 0x400f4200
#define CYDEV_UDB_DSI2_SIZE 0x00000100
#define CYREG_UDB_DSI2_HC0 0x400f4200
#define CYREG_UDB_DSI2_HC1 0x400f4201
#define CYREG_UDB_DSI2_HC2 0x400f4202
#define CYREG_UDB_DSI2_HC3 0x400f4203
#define CYREG_UDB_DSI2_HC4 0x400f4204
#define CYREG_UDB_DSI2_HC5 0x400f4205
#define CYREG_UDB_DSI2_HC6 0x400f4206
#define CYREG_UDB_DSI2_HC7 0x400f4207
#define CYREG_UDB_DSI2_HC8 0x400f4208
#define CYREG_UDB_DSI2_HC9 0x400f4209
#define CYREG_UDB_DSI2_HC10 0x400f420a
#define CYREG_UDB_DSI2_HC11 0x400f420b
#define CYREG_UDB_DSI2_HC12 0x400f420c
#define CYREG_UDB_DSI2_HC13 0x400f420d
#define CYREG_UDB_DSI2_HC14 0x400f420e
#define CYREG_UDB_DSI2_HC15 0x400f420f
#define CYREG_UDB_DSI2_HC16 0x400f4210
#define CYREG_UDB_DSI2_HC17 0x400f4211
#define CYREG_UDB_DSI2_HC18 0x400f4212
#define CYREG_UDB_DSI2_HC19 0x400f4213
#define CYREG_UDB_DSI2_HC20 0x400f4214
#define CYREG_UDB_DSI2_HC21 0x400f4215
#define CYREG_UDB_DSI2_HC22 0x400f4216
#define CYREG_UDB_DSI2_HC23 0x400f4217
#define CYREG_UDB_DSI2_HC24 0x400f4218
#define CYREG_UDB_DSI2_HC25 0x400f4219
#define CYREG_UDB_DSI2_HC26 0x400f421a
#define CYREG_UDB_DSI2_HC27 0x400f421b
#define CYREG_UDB_DSI2_HC28 0x400f421c
#define CYREG_UDB_DSI2_HC29 0x400f421d
#define CYREG_UDB_DSI2_HC30 0x400f421e
#define CYREG_UDB_DSI2_HC31 0x400f421f
#define CYREG_UDB_DSI2_HC32 0x400f4220
#define CYREG_UDB_DSI2_HC33 0x400f4221
#define CYREG_UDB_DSI2_HC34 0x400f4222
#define CYREG_UDB_DSI2_HC35 0x400f4223
#define CYREG_UDB_DSI2_HC36 0x400f4224
#define CYREG_UDB_DSI2_HC37 0x400f4225
#define CYREG_UDB_DSI2_HC38 0x400f4226
#define CYREG_UDB_DSI2_HC39 0x400f4227
#define CYREG_UDB_DSI2_HC40 0x400f4228
#define CYREG_UDB_DSI2_HC41 0x400f4229
#define CYREG_UDB_DSI2_HC42 0x400f422a
#define CYREG_UDB_DSI2_HC43 0x400f422b
#define CYREG_UDB_DSI2_HC44 0x400f422c
#define CYREG_UDB_DSI2_HC45 0x400f422d
#define CYREG_UDB_DSI2_HC46 0x400f422e
#define CYREG_UDB_DSI2_HC47 0x400f422f
#define CYREG_UDB_DSI2_HC48 0x400f4230
#define CYREG_UDB_DSI2_HC49 0x400f4231
#define CYREG_UDB_DSI2_HC50 0x400f4232
#define CYREG_UDB_DSI2_HC51 0x400f4233
#define CYREG_UDB_DSI2_HC52 0x400f4234
#define CYREG_UDB_DSI2_HC53 0x400f4235
#define CYREG_UDB_DSI2_HC54 0x400f4236
#define CYREG_UDB_DSI2_HC55 0x400f4237
#define CYREG_UDB_DSI2_HC56 0x400f4238
#define CYREG_UDB_DSI2_HC57 0x400f4239
#define CYREG_UDB_DSI2_HC58 0x400f423a
#define CYREG_UDB_DSI2_HC59 0x400f423b
#define CYREG_UDB_DSI2_HC60 0x400f423c
#define CYREG_UDB_DSI2_HC61 0x400f423d
#define CYREG_UDB_DSI2_HC62 0x400f423e
#define CYREG_UDB_DSI2_HC63 0x400f423f
#define CYREG_UDB_DSI2_HC64 0x400f4240
#define CYREG_UDB_DSI2_HC65 0x400f4241
#define CYREG_UDB_DSI2_HC66 0x400f4242
#define CYREG_UDB_DSI2_HC67 0x400f4243
#define CYREG_UDB_DSI2_HC68 0x400f4244
#define CYREG_UDB_DSI2_HC69 0x400f4245
#define CYREG_UDB_DSI2_HC70 0x400f4246
#define CYREG_UDB_DSI2_HC71 0x400f4247
#define CYREG_UDB_DSI2_HC72 0x400f4248
#define CYREG_UDB_DSI2_HC73 0x400f4249
#define CYREG_UDB_DSI2_HC74 0x400f424a
#define CYREG_UDB_DSI2_HC75 0x400f424b
#define CYREG_UDB_DSI2_HC76 0x400f424c
#define CYREG_UDB_DSI2_HC77 0x400f424d
#define CYREG_UDB_DSI2_HC78 0x400f424e
#define CYREG_UDB_DSI2_HC79 0x400f424f
#define CYREG_UDB_DSI2_HC80 0x400f4250
#define CYREG_UDB_DSI2_HC81 0x400f4251
#define CYREG_UDB_DSI2_HC82 0x400f4252
#define CYREG_UDB_DSI2_HC83 0x400f4253
#define CYREG_UDB_DSI2_HC84 0x400f4254
#define CYREG_UDB_DSI2_HC85 0x400f4255
#define CYREG_UDB_DSI2_HC86 0x400f4256
#define CYREG_UDB_DSI2_HC87 0x400f4257
#define CYREG_UDB_DSI2_HC88 0x400f4258
#define CYREG_UDB_DSI2_HC89 0x400f4259
#define CYREG_UDB_DSI2_HC90 0x400f425a
#define CYREG_UDB_DSI2_HC91 0x400f425b
#define CYREG_UDB_DSI2_HC92 0x400f425c
#define CYREG_UDB_DSI2_HC93 0x400f425d
#define CYREG_UDB_DSI2_HC94 0x400f425e
#define CYREG_UDB_DSI2_HC95 0x400f425f
#define CYREG_UDB_DSI2_HC96 0x400f4260
#define CYREG_UDB_DSI2_HC97 0x400f4261
#define CYREG_UDB_DSI2_HC98 0x400f4262
#define CYREG_UDB_DSI2_HC99 0x400f4263
#define CYREG_UDB_DSI2_HC100 0x400f4264
#define CYREG_UDB_DSI2_HC101 0x400f4265
#define CYREG_UDB_DSI2_HC102 0x400f4266
#define CYREG_UDB_DSI2_HC103 0x400f4267
#define CYREG_UDB_DSI2_HC104 0x400f4268
#define CYREG_UDB_DSI2_HC105 0x400f4269
#define CYREG_UDB_DSI2_HC106 0x400f426a
#define CYREG_UDB_DSI2_HC107 0x400f426b
#define CYREG_UDB_DSI2_HC108 0x400f426c
#define CYREG_UDB_DSI2_HC109 0x400f426d
#define CYREG_UDB_DSI2_HC110 0x400f426e
#define CYREG_UDB_DSI2_HC111 0x400f426f
#define CYREG_UDB_DSI2_HC112 0x400f4270
#define CYREG_UDB_DSI2_HC113 0x400f4271
#define CYREG_UDB_DSI2_HC114 0x400f4272
#define CYREG_UDB_DSI2_HC115 0x400f4273
#define CYREG_UDB_DSI2_HC116 0x400f4274
#define CYREG_UDB_DSI2_HC117 0x400f4275
#define CYREG_UDB_DSI2_HC118 0x400f4276
#define CYREG_UDB_DSI2_HC119 0x400f4277
#define CYREG_UDB_DSI2_HC120 0x400f4278
#define CYREG_UDB_DSI2_HC121 0x400f4279
#define CYREG_UDB_DSI2_HC122 0x400f427a
#define CYREG_UDB_DSI2_HC123 0x400f427b
#define CYREG_UDB_DSI2_HC124 0x400f427c
#define CYREG_UDB_DSI2_HC125 0x400f427d
#define CYREG_UDB_DSI2_HC126 0x400f427e
#define CYREG_UDB_DSI2_HC127 0x400f427f
#define CYREG_UDB_DSI2_HV_L0 0x400f4280
#define CYREG_UDB_DSI2_HV_L1 0x400f4281
#define CYREG_UDB_DSI2_HV_L2 0x400f4282
#define CYREG_UDB_DSI2_HV_L3 0x400f4283
#define CYREG_UDB_DSI2_HV_L4 0x400f4284
#define CYREG_UDB_DSI2_HV_L5 0x400f4285
#define CYREG_UDB_DSI2_HV_L6 0x400f4286
#define CYREG_UDB_DSI2_HV_L7 0x400f4287
#define CYREG_UDB_DSI2_HV_L8 0x400f4288
#define CYREG_UDB_DSI2_HV_L9 0x400f4289
#define CYREG_UDB_DSI2_HV_L10 0x400f428a
#define CYREG_UDB_DSI2_HV_L11 0x400f428b
#define CYREG_UDB_DSI2_HV_L12 0x400f428c
#define CYREG_UDB_DSI2_HV_L13 0x400f428d
#define CYREG_UDB_DSI2_HV_L14 0x400f428e
#define CYREG_UDB_DSI2_HV_L15 0x400f428f
#define CYREG_UDB_DSI2_HS0 0x400f4290
#define CYREG_UDB_DSI2_HS1 0x400f4291
#define CYREG_UDB_DSI2_HS2 0x400f4292
#define CYREG_UDB_DSI2_HS3 0x400f4293
#define CYREG_UDB_DSI2_HS4 0x400f4294
#define CYREG_UDB_DSI2_HS5 0x400f4295
#define CYREG_UDB_DSI2_HS6 0x400f4296
#define CYREG_UDB_DSI2_HS7 0x400f4297
#define CYREG_UDB_DSI2_HS8 0x400f4298
#define CYREG_UDB_DSI2_HS9 0x400f4299
#define CYREG_UDB_DSI2_HS10 0x400f429a
#define CYREG_UDB_DSI2_HS11 0x400f429b
#define CYREG_UDB_DSI2_HS12 0x400f429c
#define CYREG_UDB_DSI2_HS13 0x400f429d
#define CYREG_UDB_DSI2_HS14 0x400f429e
#define CYREG_UDB_DSI2_HS15 0x400f429f
#define CYREG_UDB_DSI2_HS16 0x400f42a0
#define CYREG_UDB_DSI2_HS17 0x400f42a1
#define CYREG_UDB_DSI2_HS18 0x400f42a2
#define CYREG_UDB_DSI2_HS19 0x400f42a3
#define CYREG_UDB_DSI2_HS20 0x400f42a4
#define CYREG_UDB_DSI2_HS21 0x400f42a5
#define CYREG_UDB_DSI2_HS22 0x400f42a6
#define CYREG_UDB_DSI2_HS23 0x400f42a7
#define CYREG_UDB_DSI2_HV_R0 0x400f42a8
#define CYREG_UDB_DSI2_HV_R1 0x400f42a9
#define CYREG_UDB_DSI2_HV_R2 0x400f42aa
#define CYREG_UDB_DSI2_HV_R3 0x400f42ab
#define CYREG_UDB_DSI2_HV_R4 0x400f42ac
#define CYREG_UDB_DSI2_HV_R5 0x400f42ad
#define CYREG_UDB_DSI2_HV_R6 0x400f42ae
#define CYREG_UDB_DSI2_HV_R7 0x400f42af
#define CYREG_UDB_DSI2_HV_R8 0x400f42b0
#define CYREG_UDB_DSI2_HV_R9 0x400f42b1
#define CYREG_UDB_DSI2_HV_R10 0x400f42b2
#define CYREG_UDB_DSI2_HV_R11 0x400f42b3
#define CYREG_UDB_DSI2_HV_R12 0x400f42b4
#define CYREG_UDB_DSI2_HV_R13 0x400f42b5
#define CYREG_UDB_DSI2_HV_R14 0x400f42b6
#define CYREG_UDB_DSI2_HV_R15 0x400f42b7
#define CYREG_UDB_DSI2_DSIINP0 0x400f42c0
#define CYREG_UDB_DSI2_DSIINP1 0x400f42c2
#define CYREG_UDB_DSI2_DSIINP2 0x400f42c4
#define CYREG_UDB_DSI2_DSIINP3 0x400f42c6
#define CYREG_UDB_DSI2_DSIINP4 0x400f42c8
#define CYREG_UDB_DSI2_DSIINP5 0x400f42ca
#define CYREG_UDB_DSI2_DSIOUTP0 0x400f42cc
#define CYREG_UDB_DSI2_DSIOUTP1 0x400f42ce
#define CYREG_UDB_DSI2_DSIOUTP2 0x400f42d0
#define CYREG_UDB_DSI2_DSIOUTP3 0x400f42d2
#define CYREG_UDB_DSI2_DSIOUTT0 0x400f42d4
#define CYREG_UDB_DSI2_DSIOUTT1 0x400f42d6
#define CYREG_UDB_DSI2_DSIOUTT2 0x400f42d8
#define CYREG_UDB_DSI2_DSIOUTT3 0x400f42da
#define CYREG_UDB_DSI2_DSIOUTT4 0x400f42dc
#define CYREG_UDB_DSI2_DSIOUTT5 0x400f42de
#define CYREG_UDB_DSI2_VS0 0x400f42e0
#define CYREG_UDB_DSI2_VS1 0x400f42e2
#define CYREG_UDB_DSI2_VS2 0x400f42e4
#define CYREG_UDB_DSI2_VS3 0x400f42e6
#define CYREG_UDB_DSI2_VS4 0x400f42e8
#define CYREG_UDB_DSI2_VS5 0x400f42ea
#define CYREG_UDB_DSI2_VS6 0x400f42ec
#define CYREG_UDB_DSI2_VS7 0x400f42ee
#define CYDEV_UDB_DSI3_BASE 0x400f4300
#define CYDEV_UDB_DSI3_SIZE 0x00000100
#define CYREG_UDB_DSI3_HC0 0x400f4300
#define CYREG_UDB_DSI3_HC1 0x400f4301
#define CYREG_UDB_DSI3_HC2 0x400f4302
#define CYREG_UDB_DSI3_HC3 0x400f4303
#define CYREG_UDB_DSI3_HC4 0x400f4304
#define CYREG_UDB_DSI3_HC5 0x400f4305
#define CYREG_UDB_DSI3_HC6 0x400f4306
#define CYREG_UDB_DSI3_HC7 0x400f4307
#define CYREG_UDB_DSI3_HC8 0x400f4308
#define CYREG_UDB_DSI3_HC9 0x400f4309
#define CYREG_UDB_DSI3_HC10 0x400f430a
#define CYREG_UDB_DSI3_HC11 0x400f430b
#define CYREG_UDB_DSI3_HC12 0x400f430c
#define CYREG_UDB_DSI3_HC13 0x400f430d
#define CYREG_UDB_DSI3_HC14 0x400f430e
#define CYREG_UDB_DSI3_HC15 0x400f430f
#define CYREG_UDB_DSI3_HC16 0x400f4310
#define CYREG_UDB_DSI3_HC17 0x400f4311
#define CYREG_UDB_DSI3_HC18 0x400f4312
#define CYREG_UDB_DSI3_HC19 0x400f4313
#define CYREG_UDB_DSI3_HC20 0x400f4314
#define CYREG_UDB_DSI3_HC21 0x400f4315
#define CYREG_UDB_DSI3_HC22 0x400f4316
#define CYREG_UDB_DSI3_HC23 0x400f4317
#define CYREG_UDB_DSI3_HC24 0x400f4318
#define CYREG_UDB_DSI3_HC25 0x400f4319
#define CYREG_UDB_DSI3_HC26 0x400f431a
#define CYREG_UDB_DSI3_HC27 0x400f431b
#define CYREG_UDB_DSI3_HC28 0x400f431c
#define CYREG_UDB_DSI3_HC29 0x400f431d
#define CYREG_UDB_DSI3_HC30 0x400f431e
#define CYREG_UDB_DSI3_HC31 0x400f431f
#define CYREG_UDB_DSI3_HC32 0x400f4320
#define CYREG_UDB_DSI3_HC33 0x400f4321
#define CYREG_UDB_DSI3_HC34 0x400f4322
#define CYREG_UDB_DSI3_HC35 0x400f4323
#define CYREG_UDB_DSI3_HC36 0x400f4324
#define CYREG_UDB_DSI3_HC37 0x400f4325
#define CYREG_UDB_DSI3_HC38 0x400f4326
#define CYREG_UDB_DSI3_HC39 0x400f4327
#define CYREG_UDB_DSI3_HC40 0x400f4328
#define CYREG_UDB_DSI3_HC41 0x400f4329
#define CYREG_UDB_DSI3_HC42 0x400f432a
#define CYREG_UDB_DSI3_HC43 0x400f432b
#define CYREG_UDB_DSI3_HC44 0x400f432c
#define CYREG_UDB_DSI3_HC45 0x400f432d
#define CYREG_UDB_DSI3_HC46 0x400f432e
#define CYREG_UDB_DSI3_HC47 0x400f432f
#define CYREG_UDB_DSI3_HC48 0x400f4330
#define CYREG_UDB_DSI3_HC49 0x400f4331
#define CYREG_UDB_DSI3_HC50 0x400f4332
#define CYREG_UDB_DSI3_HC51 0x400f4333
#define CYREG_UDB_DSI3_HC52 0x400f4334
#define CYREG_UDB_DSI3_HC53 0x400f4335
#define CYREG_UDB_DSI3_HC54 0x400f4336
#define CYREG_UDB_DSI3_HC55 0x400f4337
#define CYREG_UDB_DSI3_HC56 0x400f4338
#define CYREG_UDB_DSI3_HC57 0x400f4339
#define CYREG_UDB_DSI3_HC58 0x400f433a
#define CYREG_UDB_DSI3_HC59 0x400f433b
#define CYREG_UDB_DSI3_HC60 0x400f433c
#define CYREG_UDB_DSI3_HC61 0x400f433d
#define CYREG_UDB_DSI3_HC62 0x400f433e
#define CYREG_UDB_DSI3_HC63 0x400f433f
#define CYREG_UDB_DSI3_HC64 0x400f4340
#define CYREG_UDB_DSI3_HC65 0x400f4341
#define CYREG_UDB_DSI3_HC66 0x400f4342
#define CYREG_UDB_DSI3_HC67 0x400f4343
#define CYREG_UDB_DSI3_HC68 0x400f4344
#define CYREG_UDB_DSI3_HC69 0x400f4345
#define CYREG_UDB_DSI3_HC70 0x400f4346
#define CYREG_UDB_DSI3_HC71 0x400f4347
#define CYREG_UDB_DSI3_HC72 0x400f4348
#define CYREG_UDB_DSI3_HC73 0x400f4349
#define CYREG_UDB_DSI3_HC74 0x400f434a
#define CYREG_UDB_DSI3_HC75 0x400f434b
#define CYREG_UDB_DSI3_HC76 0x400f434c
#define CYREG_UDB_DSI3_HC77 0x400f434d
#define CYREG_UDB_DSI3_HC78 0x400f434e
#define CYREG_UDB_DSI3_HC79 0x400f434f
#define CYREG_UDB_DSI3_HC80 0x400f4350
#define CYREG_UDB_DSI3_HC81 0x400f4351
#define CYREG_UDB_DSI3_HC82 0x400f4352
#define CYREG_UDB_DSI3_HC83 0x400f4353
#define CYREG_UDB_DSI3_HC84 0x400f4354
#define CYREG_UDB_DSI3_HC85 0x400f4355
#define CYREG_UDB_DSI3_HC86 0x400f4356
#define CYREG_UDB_DSI3_HC87 0x400f4357
#define CYREG_UDB_DSI3_HC88 0x400f4358
#define CYREG_UDB_DSI3_HC89 0x400f4359
#define CYREG_UDB_DSI3_HC90 0x400f435a
#define CYREG_UDB_DSI3_HC91 0x400f435b
#define CYREG_UDB_DSI3_HC92 0x400f435c
#define CYREG_UDB_DSI3_HC93 0x400f435d
#define CYREG_UDB_DSI3_HC94 0x400f435e
#define CYREG_UDB_DSI3_HC95 0x400f435f
#define CYREG_UDB_DSI3_HC96 0x400f4360
#define CYREG_UDB_DSI3_HC97 0x400f4361
#define CYREG_UDB_DSI3_HC98 0x400f4362
#define CYREG_UDB_DSI3_HC99 0x400f4363
#define CYREG_UDB_DSI3_HC100 0x400f4364
#define CYREG_UDB_DSI3_HC101 0x400f4365
#define CYREG_UDB_DSI3_HC102 0x400f4366
#define CYREG_UDB_DSI3_HC103 0x400f4367
#define CYREG_UDB_DSI3_HC104 0x400f4368
#define CYREG_UDB_DSI3_HC105 0x400f4369
#define CYREG_UDB_DSI3_HC106 0x400f436a
#define CYREG_UDB_DSI3_HC107 0x400f436b
#define CYREG_UDB_DSI3_HC108 0x400f436c
#define CYREG_UDB_DSI3_HC109 0x400f436d
#define CYREG_UDB_DSI3_HC110 0x400f436e
#define CYREG_UDB_DSI3_HC111 0x400f436f
#define CYREG_UDB_DSI3_HC112 0x400f4370
#define CYREG_UDB_DSI3_HC113 0x400f4371
#define CYREG_UDB_DSI3_HC114 0x400f4372
#define CYREG_UDB_DSI3_HC115 0x400f4373
#define CYREG_UDB_DSI3_HC116 0x400f4374
#define CYREG_UDB_DSI3_HC117 0x400f4375
#define CYREG_UDB_DSI3_HC118 0x400f4376
#define CYREG_UDB_DSI3_HC119 0x400f4377
#define CYREG_UDB_DSI3_HC120 0x400f4378
#define CYREG_UDB_DSI3_HC121 0x400f4379
#define CYREG_UDB_DSI3_HC122 0x400f437a
#define CYREG_UDB_DSI3_HC123 0x400f437b
#define CYREG_UDB_DSI3_HC124 0x400f437c
#define CYREG_UDB_DSI3_HC125 0x400f437d
#define CYREG_UDB_DSI3_HC126 0x400f437e
#define CYREG_UDB_DSI3_HC127 0x400f437f
#define CYREG_UDB_DSI3_HV_L0 0x400f4380
#define CYREG_UDB_DSI3_HV_L1 0x400f4381
#define CYREG_UDB_DSI3_HV_L2 0x400f4382
#define CYREG_UDB_DSI3_HV_L3 0x400f4383
#define CYREG_UDB_DSI3_HV_L4 0x400f4384
#define CYREG_UDB_DSI3_HV_L5 0x400f4385
#define CYREG_UDB_DSI3_HV_L6 0x400f4386
#define CYREG_UDB_DSI3_HV_L7 0x400f4387
#define CYREG_UDB_DSI3_HV_L8 0x400f4388
#define CYREG_UDB_DSI3_HV_L9 0x400f4389
#define CYREG_UDB_DSI3_HV_L10 0x400f438a
#define CYREG_UDB_DSI3_HV_L11 0x400f438b
#define CYREG_UDB_DSI3_HV_L12 0x400f438c
#define CYREG_UDB_DSI3_HV_L13 0x400f438d
#define CYREG_UDB_DSI3_HV_L14 0x400f438e
#define CYREG_UDB_DSI3_HV_L15 0x400f438f
#define CYREG_UDB_DSI3_HS0 0x400f4390
#define CYREG_UDB_DSI3_HS1 0x400f4391
#define CYREG_UDB_DSI3_HS2 0x400f4392
#define CYREG_UDB_DSI3_HS3 0x400f4393
#define CYREG_UDB_DSI3_HS4 0x400f4394
#define CYREG_UDB_DSI3_HS5 0x400f4395
#define CYREG_UDB_DSI3_HS6 0x400f4396
#define CYREG_UDB_DSI3_HS7 0x400f4397
#define CYREG_UDB_DSI3_HS8 0x400f4398
#define CYREG_UDB_DSI3_HS9 0x400f4399
#define CYREG_UDB_DSI3_HS10 0x400f439a
#define CYREG_UDB_DSI3_HS11 0x400f439b
#define CYREG_UDB_DSI3_HS12 0x400f439c
#define CYREG_UDB_DSI3_HS13 0x400f439d
#define CYREG_UDB_DSI3_HS14 0x400f439e
#define CYREG_UDB_DSI3_HS15 0x400f439f
#define CYREG_UDB_DSI3_HS16 0x400f43a0
#define CYREG_UDB_DSI3_HS17 0x400f43a1
#define CYREG_UDB_DSI3_HS18 0x400f43a2
#define CYREG_UDB_DSI3_HS19 0x400f43a3
#define CYREG_UDB_DSI3_HS20 0x400f43a4
#define CYREG_UDB_DSI3_HS21 0x400f43a5
#define CYREG_UDB_DSI3_HS22 0x400f43a6
#define CYREG_UDB_DSI3_HS23 0x400f43a7
#define CYREG_UDB_DSI3_HV_R0 0x400f43a8
#define CYREG_UDB_DSI3_HV_R1 0x400f43a9
#define CYREG_UDB_DSI3_HV_R2 0x400f43aa
#define CYREG_UDB_DSI3_HV_R3 0x400f43ab
#define CYREG_UDB_DSI3_HV_R4 0x400f43ac
#define CYREG_UDB_DSI3_HV_R5 0x400f43ad
#define CYREG_UDB_DSI3_HV_R6 0x400f43ae
#define CYREG_UDB_DSI3_HV_R7 0x400f43af
#define CYREG_UDB_DSI3_HV_R8 0x400f43b0
#define CYREG_UDB_DSI3_HV_R9 0x400f43b1
#define CYREG_UDB_DSI3_HV_R10 0x400f43b2
#define CYREG_UDB_DSI3_HV_R11 0x400f43b3
#define CYREG_UDB_DSI3_HV_R12 0x400f43b4
#define CYREG_UDB_DSI3_HV_R13 0x400f43b5
#define CYREG_UDB_DSI3_HV_R14 0x400f43b6
#define CYREG_UDB_DSI3_HV_R15 0x400f43b7
#define CYREG_UDB_DSI3_DSIINP0 0x400f43c0
#define CYREG_UDB_DSI3_DSIINP1 0x400f43c2
#define CYREG_UDB_DSI3_DSIINP2 0x400f43c4
#define CYREG_UDB_DSI3_DSIINP3 0x400f43c6
#define CYREG_UDB_DSI3_DSIINP4 0x400f43c8
#define CYREG_UDB_DSI3_DSIINP5 0x400f43ca
#define CYREG_UDB_DSI3_DSIOUTP0 0x400f43cc
#define CYREG_UDB_DSI3_DSIOUTP1 0x400f43ce
#define CYREG_UDB_DSI3_DSIOUTP2 0x400f43d0
#define CYREG_UDB_DSI3_DSIOUTP3 0x400f43d2
#define CYREG_UDB_DSI3_DSIOUTT0 0x400f43d4
#define CYREG_UDB_DSI3_DSIOUTT1 0x400f43d6
#define CYREG_UDB_DSI3_DSIOUTT2 0x400f43d8
#define CYREG_UDB_DSI3_DSIOUTT3 0x400f43da
#define CYREG_UDB_DSI3_DSIOUTT4 0x400f43dc
#define CYREG_UDB_DSI3_DSIOUTT5 0x400f43de
#define CYREG_UDB_DSI3_VS0 0x400f43e0
#define CYREG_UDB_DSI3_VS1 0x400f43e2
#define CYREG_UDB_DSI3_VS2 0x400f43e4
#define CYREG_UDB_DSI3_VS3 0x400f43e6
#define CYREG_UDB_DSI3_VS4 0x400f43e8
#define CYREG_UDB_DSI3_VS5 0x400f43ea
#define CYREG_UDB_DSI3_VS6 0x400f43ec
#define CYREG_UDB_DSI3_VS7 0x400f43ee
#define CYDEV_UDB_PA0_BASE 0x400f5000
#define CYDEV_UDB_PA0_SIZE 0x00000010
#define CYREG_UDB_PA0_CFG0 0x400f5000
#define CYREG_UDB_PA0_CFG1 0x400f5001
#define CYREG_UDB_PA0_CFG2 0x400f5002
#define CYREG_UDB_PA0_CFG3 0x400f5003
#define CYREG_UDB_PA0_CFG4 0x400f5004
#define CYREG_UDB_PA0_CFG5 0x400f5005
#define CYREG_UDB_PA0_CFG6 0x400f5006
#define CYREG_UDB_PA0_CFG7 0x400f5007
#define CYREG_UDB_PA0_CFG8 0x400f5008
#define CYREG_UDB_PA0_CFG9 0x400f5009
#define CYREG_UDB_PA0_CFG10 0x400f500a
#define CYREG_UDB_PA0_CFG11 0x400f500b
#define CYREG_UDB_PA0_CFG12 0x400f500c
#define CYREG_UDB_PA0_CFG13 0x400f500d
#define CYREG_UDB_PA0_CFG14 0x400f500e
#define CYDEV_UDB_PA1_BASE 0x400f5010
#define CYDEV_UDB_PA1_SIZE 0x00000010
#define CYREG_UDB_PA1_CFG0 0x400f5010
#define CYREG_UDB_PA1_CFG1 0x400f5011
#define CYREG_UDB_PA1_CFG2 0x400f5012
#define CYREG_UDB_PA1_CFG3 0x400f5013
#define CYREG_UDB_PA1_CFG4 0x400f5014
#define CYREG_UDB_PA1_CFG5 0x400f5015
#define CYREG_UDB_PA1_CFG6 0x400f5016
#define CYREG_UDB_PA1_CFG7 0x400f5017
#define CYREG_UDB_PA1_CFG8 0x400f5018
#define CYREG_UDB_PA1_CFG9 0x400f5019
#define CYREG_UDB_PA1_CFG10 0x400f501a
#define CYREG_UDB_PA1_CFG11 0x400f501b
#define CYREG_UDB_PA1_CFG12 0x400f501c
#define CYREG_UDB_PA1_CFG13 0x400f501d
#define CYREG_UDB_PA1_CFG14 0x400f501e
#define CYDEV_UDB_PA2_BASE 0x400f5020
#define CYDEV_UDB_PA2_SIZE 0x00000010
#define CYREG_UDB_PA2_CFG0 0x400f5020
#define CYREG_UDB_PA2_CFG1 0x400f5021
#define CYREG_UDB_PA2_CFG2 0x400f5022
#define CYREG_UDB_PA2_CFG3 0x400f5023
#define CYREG_UDB_PA2_CFG4 0x400f5024
#define CYREG_UDB_PA2_CFG5 0x400f5025
#define CYREG_UDB_PA2_CFG6 0x400f5026
#define CYREG_UDB_PA2_CFG7 0x400f5027
#define CYREG_UDB_PA2_CFG8 0x400f5028
#define CYREG_UDB_PA2_CFG9 0x400f5029
#define CYREG_UDB_PA2_CFG10 0x400f502a
#define CYREG_UDB_PA2_CFG11 0x400f502b
#define CYREG_UDB_PA2_CFG12 0x400f502c
#define CYREG_UDB_PA2_CFG13 0x400f502d
#define CYREG_UDB_PA2_CFG14 0x400f502e
#define CYDEV_UDB_PA3_BASE 0x400f5030
#define CYDEV_UDB_PA3_SIZE 0x00000010
#define CYREG_UDB_PA3_CFG0 0x400f5030
#define CYREG_UDB_PA3_CFG1 0x400f5031
#define CYREG_UDB_PA3_CFG2 0x400f5032
#define CYREG_UDB_PA3_CFG3 0x400f5033
#define CYREG_UDB_PA3_CFG4 0x400f5034
#define CYREG_UDB_PA3_CFG5 0x400f5035
#define CYREG_UDB_PA3_CFG6 0x400f5036
#define CYREG_UDB_PA3_CFG7 0x400f5037
#define CYREG_UDB_PA3_CFG8 0x400f5038
#define CYREG_UDB_PA3_CFG9 0x400f5039
#define CYREG_UDB_PA3_CFG10 0x400f503a
#define CYREG_UDB_PA3_CFG11 0x400f503b
#define CYREG_UDB_PA3_CFG12 0x400f503c
#define CYREG_UDB_PA3_CFG13 0x400f503d
#define CYREG_UDB_PA3_CFG14 0x400f503e
#define CYDEV_UDB_BCTL0_BASE 0x400f6000
#define CYDEV_UDB_BCTL0_SIZE 0x00001000
#define CYREG_UDB_BCTL0_DRV 0x400f6000
#define CYREG_UDB_BCTL0_MDCLK_EN 0x400f6001
#define CYREG_UDB_BCTL0_MBCLK_EN 0x400f6002
#define CYREG_UDB_BCTL0_BOTSEL_L 0x400f6008
#define CYREG_UDB_BCTL0_BOTSEL_U 0x400f6009
#define CYREG_UDB_BCTL0_TOPSEL_L 0x400f600a
#define CYREG_UDB_BCTL0_TOPSEL_U 0x400f600b
#define CYREG_UDB_BCTL0_QCLK_EN0 0x400f6010
#define CYREG_UDB_BCTL0_QCLK_EN1 0x400f6012
#define CYDEV_UDB_UDBIF_BASE 0x400f7000
#define CYDEV_UDB_UDBIF_SIZE 0x00001000
#define CYREG_UDB_UDBIF_BANK_CTL 0x400f7000
#define CYREG_UDB_UDBIF_WAIT_CFG 0x400f7001
#define CYREG_UDB_UDBIF_INT_CLK_CTL 0x400f701c
#define CYREG_UDB_INT_CFG 0x400f8000
#define CYDEV_CTBM_BASE 0x40100000
#define CYDEV_CTBM_SIZE 0x00010000
#define CYREG_CTBM_CTB_CTRL 0x40100000
#define CYREG_CTBM_OA_RES0_CTRL 0x40100004
#define CYREG_CTBM_OA_RES1_CTRL 0x40100008
#define CYREG_CTBM_COMP_STAT 0x4010000c
#define CYREG_CTBM_INTR 0x40100020
#define CYREG_CTBM_INTR_SET 0x40100024
#define CYREG_CTBM_INTR_MASK 0x40100028
#define CYREG_CTBM_INTR_MASKED 0x4010002c
#define CYREG_CTBM_DFT_CTRL 0x40100030
#define CYREG_CTBM_OA0_SW 0x40100080
#define CYREG_CTBM_OA0_SW_CLEAR 0x40100084
#define CYREG_CTBM_OA1_SW 0x40100088
#define CYREG_CTBM_OA1_SW_CLEAR 0x4010008c
#define CYREG_CTBM_CTB_SW_HW_CTRL 0x401000c0
#define CYREG_CTBM_CTB_SW_STATUS 0x401000c4
#define CYREG_CTBM_OA0_OFFSET_TRIM 0x40100f00
#define CYREG_CTBM_OA0_SLOPE_OFFSET_TRIM 0x40100f04
#define CYREG_CTBM_OA0_COMP_TRIM 0x40100f08
#define CYREG_CTBM_OA1_OFFSET_TRIM 0x40100f0c
#define CYREG_CTBM_OA1_SLOPE_OFFSET_TRIM 0x40100f10
#define CYREG_CTBM_OA1_COMP_TRIM 0x40100f14
#define CYDEV_SAR_BASE 0x401a0000
#define CYDEV_SAR_SIZE 0x00010000
#define CYREG_SAR_CTRL 0x401a0000
#define CYREG_SAR_SAMPLE_CTRL 0x401a0004
#define CYREG_SAR_SAMPLE_TIME01 0x401a0010
#define CYREG_SAR_SAMPLE_TIME23 0x401a0014
#define CYREG_SAR_RANGE_THRES 0x401a0018
#define CYREG_SAR_RANGE_COND 0x401a001c
#define CYREG_SAR_CHAN_EN 0x401a0020
#define CYREG_SAR_START_CTRL 0x401a0024
#define CYREG_SAR_DFT_CTRL 0x401a0030
#define CYREG_SAR_CHAN_CONFIG00 0x401a0080
#define CYREG_SAR_CHAN_CONFIG01 0x401a0084
#define CYREG_SAR_CHAN_CONFIG02 0x401a0088
#define CYREG_SAR_CHAN_CONFIG03 0x401a008c
#define CYREG_SAR_CHAN_CONFIG04 0x401a0090
#define CYREG_SAR_CHAN_CONFIG05 0x401a0094
#define CYREG_SAR_CHAN_CONFIG06 0x401a0098
#define CYREG_SAR_CHAN_CONFIG07 0x401a009c
#define CYREG_SAR_CHAN_WORK00 0x401a0100
#define CYREG_SAR_CHAN_WORK01 0x401a0104
#define CYREG_SAR_CHAN_WORK02 0x401a0108
#define CYREG_SAR_CHAN_WORK03 0x401a010c
#define CYREG_SAR_CHAN_WORK04 0x401a0110
#define CYREG_SAR_CHAN_WORK05 0x401a0114
#define CYREG_SAR_CHAN_WORK06 0x401a0118
#define CYREG_SAR_CHAN_WORK07 0x401a011c
#define CYREG_SAR_CHAN_RESULT00 0x401a0180
#define CYREG_SAR_CHAN_RESULT01 0x401a0184
#define CYREG_SAR_CHAN_RESULT02 0x401a0188
#define CYREG_SAR_CHAN_RESULT03 0x401a018c
#define CYREG_SAR_CHAN_RESULT04 0x401a0190
#define CYREG_SAR_CHAN_RESULT05 0x401a0194
#define CYREG_SAR_CHAN_RESULT06 0x401a0198
#define CYREG_SAR_CHAN_RESULT07 0x401a019c
#define CYREG_SAR_CHAN_WORK_VALID 0x401a0200
#define CYREG_SAR_CHAN_RESULT_VALID 0x401a0204
#define CYREG_SAR_STATUS 0x401a0208
#define CYREG_SAR_AVG_STAT 0x401a020c
#define CYREG_SAR_INTR 0x401a0210
#define CYREG_SAR_INTR_SET 0x401a0214
#define CYREG_SAR_INTR_MASK 0x401a0218
#define CYREG_SAR_INTR_MASKED 0x401a021c
#define CYREG_SAR_SATURATE_INTR 0x401a0220
#define CYREG_SAR_SATURATE_INTR_SET 0x401a0224
#define CYREG_SAR_SATURATE_INTR_MASK 0x401a0228
#define CYREG_SAR_SATURATE_INTR_MASKED 0x401a022c
#define CYREG_SAR_RANGE_INTR 0x401a0230
#define CYREG_SAR_RANGE_INTR_SET 0x401a0234
#define CYREG_SAR_RANGE_INTR_MASK 0x401a0238
#define CYREG_SAR_RANGE_INTR_MASKED 0x401a023c
#define CYREG_SAR_INTR_CAUSE 0x401a0240
#define CYREG_SAR_INJ_CHAN_CONFIG 0x401a0280
#define CYREG_SAR_INJ_RESULT 0x401a0290
#define CYREG_SAR_MUX_SWITCH0 0x401a0300
#define CYREG_SAR_MUX_SWITCH_CLEAR0 0x401a0304
#define CYREG_SAR_MUX_SWITCH1 0x401a0308
#define CYREG_SAR_MUX_SWITCH_CLEAR1 0x401a030c
#define CYREG_SAR_MUX_SWITCH_HW_CTRL 0x401a0340
#define CYREG_SAR_MUX_SWITCH_STATUS 0x401a0348
#define CYREG_SAR_PUMP_CTRL 0x401a0380
#define CYREG_SAR_ANA_TRIM 0x401a0f00
#define CYREG_SAR_WOUNDING 0x401a0f04
#define CYDEV_CM0_BASE 0xe0000000
#define CYDEV_CM0_SIZE 0x00100000
#define CYREG_CM0_DWT_PID4 0xe0001fd0
#define CYREG_CM0_DWT_PID0 0xe0001fe0
#define CYREG_CM0_DWT_PID1 0xe0001fe4
#define CYREG_CM0_DWT_PID2 0xe0001fe8
#define CYREG_CM0_DWT_PID3 0xe0001fec
#define CYREG_CM0_DWT_CID0 0xe0001ff0
#define CYREG_CM0_DWT_CID1 0xe0001ff4
#define CYREG_CM0_DWT_CID2 0xe0001ff8
#define CYREG_CM0_DWT_CID3 0xe0001ffc
#define CYREG_CM0_BP_PID4 0xe0002fd0
#define CYREG_CM0_BP_PID0 0xe0002fe0
#define CYREG_CM0_BP_PID1 0xe0002fe4
#define CYREG_CM0_BP_PID2 0xe0002fe8
#define CYREG_CM0_BP_PID3 0xe0002fec
#define CYREG_CM0_BP_CID0 0xe0002ff0
#define CYREG_CM0_BP_CID1 0xe0002ff4
#define CYREG_CM0_BP_CID2 0xe0002ff8
#define CYREG_CM0_BP_CID3 0xe0002ffc
#define CYREG_CM0_SYST_CSR 0xe000e010
#define CYREG_CM0_SYST_RVR 0xe000e014
#define CYREG_CM0_SYST_CVR 0xe000e018
#define CYREG_CM0_SYST_CALIB 0xe000e01c
#define CYREG_CM0_ISER 0xe000e100
#define CYREG_CM0_ICER 0xe000e180
#define CYREG_CM0_ISPR 0xe000e200
#define CYREG_CM0_ICPR 0xe000e280
#define CYREG_CM0_IPR0 0xe000e400
#define CYREG_CM0_IPR1 0xe000e404
#define CYREG_CM0_IPR2 0xe000e408
#define CYREG_CM0_IPR3 0xe000e40c
#define CYREG_CM0_IPR4 0xe000e410
#define CYREG_CM0_IPR5 0xe000e414
#define CYREG_CM0_IPR6 0xe000e418
#define CYREG_CM0_IPR7 0xe000e41c
#define CYREG_CM0_CPUID 0xe000ed00
#define CYREG_CM0_ICSR 0xe000ed04
#define CYREG_CM0_AIRCR 0xe000ed0c
#define CYREG_CM0_SCR 0xe000ed10
#define CYREG_CM0_CCR 0xe000ed14
#define CYREG_CM0_SHPR2 0xe000ed1c
#define CYREG_CM0_SHPR3 0xe000ed20
#define CYREG_CM0_SHCSR 0xe000ed24
#define CYREG_CM0_SCS_PID4 0xe000efd0
#define CYREG_CM0_SCS_PID0 0xe000efe0
#define CYREG_CM0_SCS_PID1 0xe000efe4
#define CYREG_CM0_SCS_PID2 0xe000efe8
#define CYREG_CM0_SCS_PID3 0xe000efec
#define CYREG_CM0_SCS_CID0 0xe000eff0
#define CYREG_CM0_SCS_CID1 0xe000eff4
#define CYREG_CM0_SCS_CID2 0xe000eff8
#define CYREG_CM0_SCS_CID3 0xe000effc
#define CYREG_CM0_ROM_SCS 0xe00ff000
#define CYREG_CM0_ROM_DWT 0xe00ff004
#define CYREG_CM0_ROM_BPU 0xe00ff008
#define CYREG_CM0_ROM_END 0xe00ff00c
#define CYREG_CM0_ROM_CSMT 0xe00fffcc
#define CYREG_CM0_ROM_PID4 0xe00fffd0
#define CYREG_CM0_ROM_PID0 0xe00fffe0
#define CYREG_CM0_ROM_PID1 0xe00fffe4
#define CYREG_CM0_ROM_PID2 0xe00fffe8
#define CYREG_CM0_ROM_PID3 0xe00fffec
#define CYREG_CM0_ROM_CID0 0xe00ffff0
#define CYREG_CM0_ROM_CID1 0xe00ffff4
#define CYREG_CM0_ROM_CID2 0xe00ffff8
#define CYREG_CM0_ROM_CID3 0xe00ffffc
#define CYDEV_CoreSightTable_BASE 0xf0000000
#define CYDEV_CoreSightTable_SIZE 0x00001000
#define CYREG_CoreSightTable_DATA_MBASE 0xf0000000
#define CYREG_CoreSightTable_DATA_MSIZE 0x00001000
#define CYDEV_FLS_SECTOR_SIZE 0x00008000
#define CYDEV_FLS_ROW_SIZE 0x00000080
